Date: Fri, 4 Dec 2020 21:34:04 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r368351 - head/sys/x86/x86 Message-ID: <202012042134.0B4LY48a081696@repo.freebsd.org>
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Author: imp Date: Fri Dec 4 21:34:04 2020 New Revision: 368351 URL: https://svnweb.freebsd.org/changeset/base/368351 Log: busdma: Annotate bus_dmamap_sync() with fence Add an explicit thread fence release before returning from bus_dmamap_sync. This should be a no-op in practice, but makes explicit that all ordinary stores will be completed before subsequent reads/writes to ordinary device memory. On x86, normal memory ordering is strong enough to generally guarantee this. The fence keeps the optimizer (likely LTO) from reordering other calls around this. The other architectures already have calls, as appropriate, that are equivalent. Note: On x86, there is one exception to this rule. If you've mapped memory as write combining, then you will need to add a sfence or similar. Normally, though, busdma doesn't operate on such memory, and drivers that do already cope appropriately. Reviewed by: kib@, gallatin@, chuck@, mav@ Differential Revision: https://reviews.freebsd.org/D27448 Modified: head/sys/x86/x86/busdma_bounce.c Modified: head/sys/x86/x86/busdma_bounce.c ============================================================================== --- head/sys/x86/x86/busdma_bounce.c Fri Dec 4 21:12:17 2020 (r368350) +++ head/sys/x86/x86/busdma_bounce.c Fri Dec 4 21:34:04 2020 (r368351) @@ -969,7 +969,7 @@ bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_ bus_size_t datacount1, datacount2; if (map == NULL || (bpage = STAILQ_FIRST(&map->bpages)) == NULL) - return; + goto out; /* * Handle data bouncing. We might also want to add support for @@ -1059,6 +1059,8 @@ next_r: } dmat->bounce_zone->total_bounced++; } +out: + atomic_thread_fence_rel(); } static void
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