Date: Mon, 17 Feb 2020 13:31:30 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r358022 - head/usr.sbin/pciconf Message-ID: <202002171331.01HDVUmU021054@repo.freebsd.org>
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Author: kib Date: Mon Feb 17 13:31:30 2020 New Revision: 358022 URL: https://svnweb.freebsd.org/changeset/base/358022 Log: pciconf: List names of all known extended PCIe capabilities. Some ids are redundand because the list_ecaps() function decodes them by explicit switch case. But listing them all makes it easier to not miss ecaps, while not changing the functionality. Initial submission by: Dmitry Luhtionov <dmitryluhtionov@gmail.com> Sponsored by: The FreeBSD Foundation MFC after: 3 days Modified: head/usr.sbin/pciconf/cap.c Modified: head/usr.sbin/pciconf/cap.c ============================================================================== --- head/usr.sbin/pciconf/cap.c Mon Feb 17 13:26:36 2020 (r358021) +++ head/usr.sbin/pciconf/cap.c Mon Feb 17 13:31:30 2020 (r358022) @@ -986,20 +986,35 @@ static struct { uint16_t id; const char *name; } ecap_names[] = { + { PCIZ_AER, "AER" }, + { PCIZ_VC, "Virtual Channel" }, + { PCIZ_SERNUM, "Device Serial Number" }, { PCIZ_PWRBDGT, "Power Budgeting" }, { PCIZ_RCLINK_DCL, "Root Complex Link Declaration" }, { PCIZ_RCLINK_CTL, "Root Complex Internal Link Control" }, { PCIZ_RCEC_ASSOC, "Root Complex Event Collector ASsociation" }, { PCIZ_MFVC, "MFVC" }, + { PCIZ_VC2, "Virtual Channel 2" }, { PCIZ_RCRB, "RCRB" }, + { PCIZ_CAC, "Configuration Access Correction" }, { PCIZ_ACS, "ACS" }, { PCIZ_ARI, "ARI" }, { PCIZ_ATS, "ATS" }, + { PCIZ_SRIOV, "SRIOV" }, + { PCIZ_MRIOV, "MRIOV" }, { PCIZ_MULTICAST, "Multicast" }, + { PCIZ_PAGE_REQ, "Page Page Request" }, + { PCIZ_AMD, "AMD proprietary "}, { PCIZ_RESIZE_BAR, "Resizable BAR" }, { PCIZ_DPA, "DPA" }, { PCIZ_TPH_REQ, "TPH Requester" }, { PCIZ_LTR, "LTR" }, + { PCIZ_SEC_PCIE, "Secondary PCI Express" }, + { PCIZ_PMUX, "Protocol Multiplexing" }, + { PCIZ_PASID, "Process Address Space ID" }, + { PCIZ_LN_REQ, "LN Requester" }, + { PCIZ_DPC, "Downstream Port Containment" }, + { PCIZ_L1PM, "L1 PM Substates" }, { 0, NULL } };
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