Date: Thu, 12 Feb 2009 23:23:30 +0000 (UTC) From: Olivier Houchard <cognet@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r188540 - in head/sys/arm: arm include Message-ID: <200902122323.n1CNNUGc069701@svn.freebsd.org>
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Author: cognet Date: Thu Feb 12 23:23:30 2009 New Revision: 188540 URL: http://svn.freebsd.org/changeset/base/188540 Log: To prevent various race conditions in the RAS code, store and restore the values in ARM_RAS_START and ARM_RAS_END at context switch time. MFC after: 1 week Modified: head/sys/arm/arm/genassym.c head/sys/arm/arm/swtch.S head/sys/arm/include/proc.h head/sys/arm/include/sysarch.h Modified: head/sys/arm/arm/genassym.c ============================================================================== --- head/sys/arm/arm/genassym.c Thu Feb 12 22:55:39 2009 (r188539) +++ head/sys/arm/arm/genassym.c Thu Feb 12 23:23:30 2009 (r188540) @@ -96,6 +96,8 @@ ASSYM(TD_FRAME, offsetof(struct thread, ASSYM(TD_MD, offsetof(struct thread, td_md)); ASSYM(TD_LOCK, offsetof(struct thread, td_lock)); ASSYM(MD_TP, offsetof(struct mdthread, md_tp)); +ASSYM(MD_RAS_START, offsetof(struct mdthread, md_ras_start)); +ASSYM(MD_RAS_END, offsetof(struct mdthread, md_ras_end)); ASSYM(TF_R0, offsetof(struct trapframe, tf_r0)); ASSYM(TF_R1, offsetof(struct trapframe, tf_r1)); Modified: head/sys/arm/arm/swtch.S ============================================================================== --- head/sys/arm/arm/swtch.S Thu Feb 12 22:55:39 2009 (r188539) +++ head/sys/arm/arm/swtch.S Thu Feb 12 23:23:30 2009 (r188540) @@ -205,8 +205,12 @@ ENTRY(cpu_throw) /* Set the new tp */ ldr r6, [r5, #(TD_MD + MD_TP)] - ldr r5, =ARM_TP_ADDRESS - strt r6, [r5] + ldr r4, =ARM_TP_ADDRESS + str r6, [r4] + ldr r6, [r5, #(TD_MD + MD_RAS_START)] + str r6, [r4, #4] /* ARM_RAS_START */ + ldr r6, [r5, #(TD_MD + MD_RAS_END)] + str r6, [r4, #4] /* ARM_RAS_END */ /* Hook in a new pcb */ ldr r6, .Lcurpcb @@ -265,12 +269,20 @@ ENTRY(cpu_switch) */ /* Store the old tp */ ldr r3, =ARM_TP_ADDRESS - ldrt r9, [r3] + ldr r9, [r3] str r9, [r0, #(TD_MD + MD_TP)] + ldr r9, [r3, #4] + str r9, [r0, #(TD_MD + MD_RAS_START)] + ldr r9, [r3, #8] + str r9, [r0, #(TD_MD + MD_RAS_END)] /* Set the new tp */ ldr r9, [r1, #(TD_MD + MD_TP)] - strt r9, [r3] + str r9, [r3] + ldr r9, [r1, #(TD_MD + MD_RAS_START)] + str r9, [r3, #4] + ldr r9, [r1, #(TD_MD + MD_RAS_END)] + str r9, [r3, #8] /* Get the user structure for the new process in r9 */ ldr r9, [r1, #(TD_PCB)] Modified: head/sys/arm/include/proc.h ============================================================================== --- head/sys/arm/include/proc.h Thu Feb 12 22:55:39 2009 (r188539) +++ head/sys/arm/include/proc.h Thu Feb 12 23:23:30 2009 (r188540) @@ -51,6 +51,8 @@ struct mdthread { int md_ptrace_instr; int md_ptrace_addr; void *md_tp; + void *md_ras_start; + void *md_ras_end; }; struct mdproc { Modified: head/sys/arm/include/sysarch.h ============================================================================== --- head/sys/arm/include/sysarch.h Thu Feb 12 22:55:39 2009 (r188539) +++ head/sys/arm/include/sysarch.h Thu Feb 12 23:23:30 2009 (r188540) @@ -42,6 +42,9 @@ * The ARM_TP_ADDRESS points to a special purpose page, which is used as local * store for the ARM per-thread data and Restartable Atomic Sequences support. * Put it just above the "high" vectors' page. + * the cpu_switch() code assumes ARM_RAS_START is ARM_TP_ADDRESS + 4, and + * ARM_RAS_END is ARM_TP_ADDRESS + 8, so if that ever changes, be sure to + * update the cpu_switch() (and cpu_throw()) code as well. */ #define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000) #define ARM_RAS_START (ARM_TP_ADDRESS + 4)
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