From owner-svn-src-head@freebsd.org Sun Jun 4 21:21:45 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BCD64BEFB0B; Sun, 4 Jun 2017 21:21:45 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9755EF9A; Sun, 4 Jun 2017 21:21:45 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v54LLidH020604; Sun, 4 Jun 2017 21:21:44 GMT (envelope-from adrian@FreeBSD.org) Received: (from adrian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v54LLiGe020603; Sun, 4 Jun 2017 21:21:44 GMT (envelope-from adrian@FreeBSD.org) Message-Id: <201706042121.v54LLiGe020603@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: adrian set sender to adrian@FreeBSD.org using -f From: Adrian Chadd Date: Sun, 4 Jun 2017 21:21:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r319583 - head/sys/contrib/dev/ath/ath_hal/ar9300 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Jun 2017 21:21:45 -0000 Author: adrian Date: Sun Jun 4 21:21:44 2017 New Revision: 319583 URL: https://svnweb.freebsd.org/changeset/base/319583 Log: [ath_hal] add USB reset PLL work around for AR9331/AR9344 (Hornet/Wasp.) It turns out that this is useful on hornet and wasp SoCs but it isn't enabled in ye olde HAL /unless/ you were using a version from one of the business units building USB targetted devices. It eventually got fixed for all of them as people started wanting to use the USB ports on their SoCs (eg for flash storage, bluetooth, 4G/LTE widgets, etc.) This is actually a fix from ath9k but I'm merging it with the available-but- disabled code in the QCA reference HAL. Tested: * AR9331 SoC Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c ============================================================================== --- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sun Jun 4 21:14:23 2017 (r319582) +++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sun Jun 4 21:21:44 2017 (r319583) @@ -90,6 +90,29 @@ do { \ #define WAR_USB_DISABLE_PLL_LOCK_DETECT(__ah) #endif +/* + * Note: the below is the version that ships with ath9k. + * The original HAL version is above. + */ + +static void +ar9300_disable_pll_lock_detect(struct ath_hal *ah) +{ + /* + * On AR9330 and AR9340 devices, some PHY registers must be + * tuned to gain better stability/performance. These registers + * might be changed while doing wlan reset so the registers must + * be reprogrammed after each reset. + */ + if (AR_SREV_HORNET(ah) || AR_SREV_WASP(ah)) { + HALDEBUG(ah, HAL_DEBUG_RESET, "%s: called\n", __func__); + OS_REG_CLR_BIT(ah, AR_PHY_USB_CTRL1, (1 << 20)); + OS_REG_RMW(ah, AR_PHY_USB_CTRL2, + (1 << 21) | (0xf << 22), + (1 << 21) | (0x3 << 22)); + } +} + static inline void ar9300_attach_hw_platform(struct ath_hal *ah) { @@ -1850,6 +1873,7 @@ ar9300_set_reset(struct ath_hal *ah, int type) /* Clear AHB reset */ OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_RC), 0); + ar9300_disable_pll_lock_detect(ah); ar9300_attach_hw_platform(ah); @@ -1984,6 +2008,7 @@ ar9300_phy_disable(struct ath_hal *ah) ar9300_init_pll(ah, AH_NULL); + ar9300_disable_pll_lock_detect(ah); return AH_TRUE; } @@ -4774,7 +4799,7 @@ ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode, st * successfully - skip the rest of reset */ if (AH9300(ah)->ah_dma_stuck != AH_TRUE) { - WAR_USB_DISABLE_PLL_LOCK_DETECT(ah); + ar9300_disable_pll_lock_detect(ah); #if ATH_SUPPORT_MCI if (AH_PRIVATE(ah)->ah_caps.halMciSupport && ahp->ah_mci_ready) { @@ -5350,7 +5375,7 @@ ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode, st #undef REG_WRITE #endif /* ATH_LOW_POWER_ENABLE */ - WAR_USB_DISABLE_PLL_LOCK_DETECT(ah); + ar9300_disable_pll_lock_detect(ah); /* H/W Green TX */ ar9300_control_signals_for_green_tx_mode(ah);