Date: Wed, 28 Nov 2018 06:56:23 +0000 (UTC) From: Andrew Rybchenko <arybchik@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r341119 - head/sys/dev/sfxge/common Message-ID: <201811280656.wAS6uNJO084662@repo.freebsd.org>
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Author: arybchik Date: Wed Nov 28 06:56:22 2018 New Revision: 341119 URL: https://svnweb.freebsd.org/changeset/base/341119 Log: sfxge(4): move VI window size config to ef10 NIC board Submitted by: Andy Moreton <amoreton at solarflare.com> Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18195 Modified: head/sys/dev/sfxge/common/ef10_impl.h head/sys/dev/sfxge/common/ef10_nic.c head/sys/dev/sfxge/common/hunt_nic.c head/sys/dev/sfxge/common/medford2_nic.c (contents, props changed) head/sys/dev/sfxge/common/medford_nic.c Modified: head/sys/dev/sfxge/common/ef10_impl.h ============================================================================== --- head/sys/dev/sfxge/common/ef10_impl.h Wed Nov 28 06:56:11 2018 (r341118) +++ head/sys/dev/sfxge/common/ef10_impl.h Wed Nov 28 06:56:22 2018 (r341119) @@ -1187,11 +1187,6 @@ efx_mcdi_get_vector_cfg( __out_opt uint32_t *pf_nvecp, __out_opt uint32_t *vf_nvecp); -extern __checkReturn efx_rc_t -ef10_get_vi_window_shift( - __in efx_nic_t *enp, - __out uint32_t *vi_window_shiftp); - extern __checkReturn efx_rc_t ef10_get_privilege_mask( __in efx_nic_t *enp, Modified: head/sys/dev/sfxge/common/ef10_nic.c ============================================================================== --- head/sys/dev/sfxge/common/ef10_nic.c Wed Nov 28 06:56:11 2018 (r341118) +++ head/sys/dev/sfxge/common/ef10_nic.c Wed Nov 28 06:56:22 2018 (r341119) @@ -1202,6 +1202,37 @@ ef10_get_datapath_caps( encp->enc_tunnel_config_udp_entries_max = 0; } + /* + * Check if firmware reports the VI window mode. + * Medford2 has a variable VI window size (8K, 16K or 64K). + * Medford and Huntington have a fixed 8K VI window size. + */ + if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V3_OUT_LEN) { + uint8_t mode = + MCDI_OUT_BYTE(req, GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE); + + switch (mode) { + case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K: + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; + break; + case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K: + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_16K; + break; + case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K: + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_64K; + break; + default: + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_INVALID; + break; + } + } else if ((enp->en_family == EFX_FAMILY_HUNTINGTON) || + (enp->en_family == EFX_FAMILY_MEDFORD)) { + /* Huntington and Medford have fixed 8K window size */ + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; + } else { + encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_INVALID; + } + /* Check if firmware supports extended MAC stats. */ if (req.emr_out_length_used >= MC_CMD_GET_CAPABILITIES_V4_OUT_LEN) { /* Extended stats buffer supported */ @@ -1224,71 +1255,6 @@ ef10_get_datapath_caps( fail4: EFSYS_PROBE(fail4); -fail3: - EFSYS_PROBE(fail3); -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, efx_rc_t, rc); - - return (rc); -} - - __checkReturn efx_rc_t -ef10_get_vi_window_shift( - __in efx_nic_t *enp, - __out uint32_t *vi_window_shiftp) -{ - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN, - MC_CMD_GET_CAPABILITIES_V3_OUT_LEN)]; - uint32_t mode; - efx_rc_t rc; - - (void) memset(payload, 0, sizeof (payload)); - req.emr_cmd = MC_CMD_GET_CAPABILITIES; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_GET_CAPABILITIES_V3_OUT_LEN; - - efx_mcdi_execute_quiet(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V3_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - mode = MCDI_OUT_BYTE(req, GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE); - - switch (mode) { - case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K: - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8 * 1024); - *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_8K; - break; - - case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K: - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_16K == 16 * 1024); - *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_16K; - break; - - case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K: - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_64K == 64 * 1024); - *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_64K; - break; - - default: - *vi_window_shiftp = EFX_VI_WINDOW_SHIFT_INVALID; - rc = EINVAL; - goto fail3; - } - - return (0); - fail3: EFSYS_PROBE(fail3); fail2: Modified: head/sys/dev/sfxge/common/hunt_nic.c ============================================================================== --- head/sys/dev/sfxge/common/hunt_nic.c Wed Nov 28 06:56:11 2018 (r341118) +++ head/sys/dev/sfxge/common/hunt_nic.c Wed Nov 28 06:56:22 2018 (r341119) @@ -110,16 +110,6 @@ hunt_board_cfg( uint32_t bandwidth; efx_rc_t rc; - /* Huntington has a fixed 8Kbyte VI window size */ - EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP == 8192); - - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8192); - encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; - /* * Enable firmware workarounds for hardware errata. * Expected responses are: Modified: head/sys/dev/sfxge/common/medford2_nic.c ============================================================================== --- head/sys/dev/sfxge/common/medford2_nic.c Wed Nov 28 06:56:11 2018 (r341118) +++ head/sys/dev/sfxge/common/medford2_nic.c Wed Nov 28 06:56:22 2018 (r341119) @@ -81,7 +81,6 @@ medford2_board_cfg( uint32_t sysclk, dpcpu_clk; uint32_t end_padding; uint32_t bandwidth; - uint32_t vi_window_shift; efx_rc_t rc; /* @@ -89,14 +88,6 @@ medford2_board_cfg( * Parts of this should be shared with Huntington. */ - /* Medford2 has a variable VI window size (8K, 16K or 64K) */ - if ((rc = ef10_get_vi_window_shift(enp, &vi_window_shift)) != 0) - goto fail1; - - EFSYS_ASSERT3U(vi_window_shift, <=, EFX_VI_WINDOW_SHIFT_64K); - encp->enc_vi_window_shift = vi_window_shift; - - /* * Enable firmware workarounds for hardware errata. * Expected responses are: @@ -137,11 +128,11 @@ medford2_board_cfg( else if ((rc == ENOTSUP) || (rc == ENOENT)) encp->enc_bug61265_workaround = B_FALSE; else - goto fail2; + goto fail1; /* Get clock frequencies (in MHz). */ if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0) - goto fail3; + goto fail2; /* * The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for @@ -157,7 +148,7 @@ medford2_board_cfg( /* Get the RX DMA end padding alignment configuration */ if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) { if (rc != EACCES) - goto fail4; + goto fail3; /* Assume largest tail padding size supported by hardware */ end_padding = 256; @@ -184,14 +175,12 @@ medford2_board_cfg( rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth); if (rc != 0) - goto fail5; + goto fail4; encp->enc_required_pcie_bandwidth_mbps = bandwidth; encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3; return (0); -fail5: - EFSYS_PROBE(fail5); fail4: EFSYS_PROBE(fail4); fail3: Modified: head/sys/dev/sfxge/common/medford_nic.c ============================================================================== --- head/sys/dev/sfxge/common/medford_nic.c Wed Nov 28 06:56:11 2018 (r341118) +++ head/sys/dev/sfxge/common/medford_nic.c Wed Nov 28 06:56:22 2018 (r341119) @@ -84,16 +84,6 @@ medford_board_cfg( * Parts of this should be shared with Huntington. */ - /* Medford has a fixed 8Kbyte VI window size */ - EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP == 8192); - EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP == 8192); - - EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8192); - encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K; - /* * Enable firmware workarounds for hardware errata. * Expected responses are:
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