Date: Wed, 3 Oct 2018 12:59:13 -0700 From: Mark Millard <marklmi@yahoo.com> To: freebsd-arm <freebsd-arm@freebsd.org> Subject: Banana Pi M3 (armv7/CortexA7) with head -339076 and u-boot 2018.09_3 from ports: what CPU clock speed is it using? More. . . Message-ID: <5B9D79C7-306E-45E0-9311-DDA0CC70C4A5@yahoo.com>
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The following leaves me wondering if the switch to linux based .dts files and related changes have also invalidated some "Supported devices" table entries in https://wiki.freebsd.org/FreeBSD/arm/Allwinner . For example: cpufreq / DVFS and/or Thermal for some columns. With -r308125 the BPi-M3 would -j4 or -j5 buildworld buildkernel for the src.conf settings that I use in about 9.5 hours. (From my 2016-Nov-05 list E-mail.) [The BPi-M3 has heat sinks, a case, and a fan.] I've not done such builds in a long time and I've not recorded times when I have. But having updated to -r339076 based and the modern 2018.09 u-boot context has the BPi-M3 just finished building lib/clang/libclang/AST/ materials after about 19 hours. top indicates swap has 1740M Total and Free. (My top modifications indicate the Max Observed Active Mem as 922M so far.) There is a big difference in clang between the two and that contributes to taking more time. But, by contrast, the (aarch64 A64 based) Pine64+ 2GB -j4 buildworld buildkernel for -r338860 built completely in about 13.75 hours, although it had faster media in the microsd card slot (e.MMC on an adapter and used in DDR52 mode via experimental changes to allow e.MMC use). This leaves me wondering if the BPi-M3 clock rate(s) for the CPU and/or RAM are set avoiding the upper end of the range compared to -r308125's time frame. (This may well be reasonable currently.) Taking a guess at relevant figures from the modern BPi-M3 configuration via sysctl -a output: hw.clock.c1cpux.frequency: 1008000000 hw.clock.c0cpux.frequency: 1008000000 . . . hw.clock.pll_c1cpux.frequency: 1008000000 hw.clock.pll_c0cpux.frequency: 1008000000 (I've not figured out anything for DRAM: I ignored anything reported as 0 and bus-*.frequency figures.) If the current context is without throttling or some such, it may be that 1 GHz or so is used to just keep things in a safe range: I see no evidence of cpu or such temperatures in the sysctl -a output so a feedback loop controlling the frequency (and voltages) may not be an option currently for the BPi-M3. However, it is possible the frequency or other behavior is unexpected. I can not tell. === Mark Millard marklmi at yahoo.com ( dsl-only.net went away in early 2018-Mar)
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