From owner-p4-projects@FreeBSD.ORG Sat Sep 29 19:42:10 2007 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E999D16A41A; Sat, 29 Sep 2007 19:42:09 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9C1BA16A421 for ; Sat, 29 Sep 2007 19:42:09 +0000 (UTC) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 84B0813C4B0 for ; Sat, 29 Sep 2007 19:42:09 +0000 (UTC) (envelope-from kmacy@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id l8TJg9Df025868 for ; Sat, 29 Sep 2007 19:42:09 GMT (envelope-from kmacy@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id l8TJg9l1025865 for perforce@freebsd.org; Sat, 29 Sep 2007 19:42:09 GMT (envelope-from kmacy@freebsd.org) Date: Sat, 29 Sep 2007 19:42:09 GMT Message-Id: <200709291942.l8TJg9l1025865@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to kmacy@freebsd.org using -f From: Kip Macy To: Perforce Change Reviews Cc: Subject: PERFORCE change 126988 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 29 Sep 2007 19:42:10 -0000 http://perforce.freebsd.org/chv.cgi?CH=126988 Change 126988 by kmacy@kmacy_home:ethng on 2007/09/29 19:41:32 fix up coalesce handling for mbuf_iovecs - toggling deferred transmit when tx ring is > half full Affected files ... .. //depot/projects/ethng/src/sys/dev/cxgb/cxgb_adapter.h#21 edit .. //depot/projects/ethng/src/sys/dev/cxgb/cxgb_main.c#22 edit .. //depot/projects/ethng/src/sys/dev/cxgb/cxgb_multiq.c#21 edit .. //depot/projects/ethng/src/sys/dev/cxgb/cxgb_sge.c#27 edit .. //depot/projects/ethng/src/sys/dev/cxgb/sys/uipc_mvec.c#9 edit Differences ... ==== //depot/projects/ethng/src/sys/dev/cxgb/cxgb_adapter.h#21 (text+ko) ==== @@ -365,6 +365,13 @@ uint8_t rxpkt_map[8]; /* maps RX_PKT interface values to port ids */ uint8_t rrss_map[SGE_QSETS]; /* revers RSS map table */ uint16_t rspq_map[RSS_TABLE_SIZE]; /* maps 7-bit cookie to qidx */ + union { + uint8_t fill[SGE_QSETS]; + uint64_t coalesce; + } u; + +#define tunq_fill u.fill +#define tunq_coalesce u.coalesce struct filter_info *filters; ==== //depot/projects/ethng/src/sys/dev/cxgb/cxgb_main.c#22 (text+ko) ==== @@ -283,7 +283,22 @@ static int set_eeprom(struct port_info *pi, const uint8_t *data, int len, int offset); -static inline char +static __inline void +check_pkt_coalesce(struct sge_qset *qs) +{ + struct adapter *sc; + struct sge_txq *txq; + + txq = &qs->txq[TXQ_ETH]; + sc = qs->port->adapter; + + if (sc->tunq_fill[qs->idx] && (txq->in_use < (txq->size>>1))) + sc->tunq_fill[qs->idx] = 0; + else if (!sc->tunq_fill[qs->idx] && (txq->in_use > (txq->size>>1))) + sc->tunq_fill[qs->idx] = 1; +} + +static __inline char t3rev2char(struct adapter *adapter) { char rev = 'z'; @@ -1874,9 +1889,9 @@ err = 0; while ((txq->in_use - in_use_init < txmax) && (txq->size > txq->in_use + TX_MAX_DESC)) { + check_pkt_coalesce(qs); count = cxgb_dequeue_packet(ifp, txq, m_vec); - - if (count == 0) + if (count == 0) break; ETHER_BPF_MTAP(ifp, m_vec[0]); ==== //depot/projects/ethng/src/sys/dev/cxgb/cxgb_multiq.c#21 (text+ko) ==== @@ -126,8 +126,7 @@ return (ENXIO); } txq = &qs->txq[TXQ_ETH]; - - DPRINTF("enqueueing packet to cpuid=%d\n", qs->qs_cpuid); + mr = &txq->txq_mr; mtx_lock(&mr->mr_lock); cons = mr->mr_cons; @@ -175,6 +174,7 @@ struct mbuf *m; struct sge_qset *qs; int count, size, coalesced; + struct adapter *sc; struct mbuf_ring *mr; mr = &txq->txq_mr; @@ -185,25 +185,43 @@ return (0); if (txq->immpkt != NULL) { + DPRINTF("immediate packet\n"); m_vec[0] = txq->immpkt; txq->immpkt = NULL; return (1); } - - for (m = mbuf_ring_dequeue(mr); m != NULL; m = mbuf_ring_dequeue(mr)) { + sc = qs->port->adapter; + + m = mbuf_ring_dequeue(mr); + if (m == NULL) + return (0); + + m_vec[0] = m; + if (m->m_pkthdr.tso_segsz > 0 || m->m_pkthdr.len > TX_WR_SIZE_MAX || m->m_next != NULL) { + DPRINTF("returning 1 packet\n"); + return (1); + } + count = 1; + size = m->m_pkthdr.len; + for (m = mbuf_ring_peek(mr); m != NULL; m = mbuf_ring_peek(mr)) { + + if (m->m_pkthdr.tso_segsz > 0 || size + m->m_pkthdr.len > TX_WR_SIZE_MAX || m->m_next != NULL) + break; + mbuf_ring_dequeue(mr); size += m->m_pkthdr.len; m_vec[count++] = m; - if (count == TX_WR_COUNT_MAX || cxgb_pcpu_tx_coalesce == 0) +#ifndef COALESCE_ALWAYS + if (count == TX_WR_COUNT_MAX || (sc->tunq_coalesce == 0) || (cxgb_pcpu_tx_coalesce == 0)) break; - m = mbuf_ring_peek(mr); +#else /* - * We can't coalesce TSO packets or past 11K + * XXX testing only */ - if (m == NULL || m->m_pkthdr.tso_segsz > 0 || size + m->m_pkthdr.len > TX_WR_SIZE_MAX || m->m_next != NULL) + if (count == TX_WR_COUNT_MAX) break; - +#endif coalesced++; } txq->txq_coalesced += coalesced; @@ -462,11 +480,13 @@ struct port_info *pi; struct sge_qset *qs; struct sge_txq *txq = NULL /* gcc is dumb */; + struct adapter *sc; pi = ifp->if_softc; + sc = pi->adapter; qs = NULL; qidx = resid = err = cookie = locked = 0; - + if (immpkt && (immpkt->m_pkthdr.rss_hash != 0)) { cookie = immpkt->m_pkthdr.rss_hash; qidx = cxgb_pcpu_cookie_to_qidx(pi, cookie); @@ -477,7 +497,7 @@ txq = &qs->txq[TXQ_ETH]; - if (mtx_trylock(&txq->lock)) { + if ((sc->tunq_coalesce == 0) && mtx_trylock(&txq->lock)) { txq->flags |= TXQ_TRANSMITTING; err = cxgb_pcpu_start_(qs, immpkt, FALSE); txq->flags &= ~TXQ_TRANSMITTING; ==== //depot/projects/ethng/src/sys/dev/cxgb/cxgb_sge.c#27 (text+ko) ==== @@ -1334,22 +1334,26 @@ if (count > 1) { struct cpl_tx_pkt_batch *cpl_batch = (struct cpl_tx_pkt_batch *)txd; int i, fidx; - + struct mbuf_iovec *batchmi; + + mv = mtomv(m0); + batchmi = mv->mv_vec; + wrp = (struct work_request_hdr *)txd; flits = count*2 + 1; txq_prod(txq, 1, &txqs); - for (fidx = 1, i = 0; i < count; i++, mi++, fidx += 2) { + for (fidx = 1, i = 0; i < count; i++, batchmi++, fidx += 2) { struct cpl_tx_pkt_batch_entry *cbe = &cpl_batch->pkt_entry[i]; cntrl = V_TXPKT_INTF(pi->txpkt_intf); - GET_VTAG_MI(cntrl, mi); + GET_VTAG_MI(cntrl, batchmi); cntrl |= V_TXPKT_OPCODE(CPL_TX_PKT); cbe->cntrl = htonl(cntrl); - cbe->len = htonl(mi->mi_len | 0x80000000); + cbe->len = htonl(batchmi->mi_len | 0x80000000); + cbe->addr = htobe64(segs[i].ds_addr); txd->flit[fidx] |= htobe64(1 << 24); - cbe->addr = htobe64(segs[i].ds_addr); } wrp->wr_hi = htonl(F_WR_SOP | F_WR_EOP | V_WR_DATATYPE(1) | @@ -1359,8 +1363,8 @@ V_WR_GEN(txqs.gen)) | htonl(V_WR_TID(txq->token)); /* XXX gen? */ wr_gen2(txd, txqs.gen); - check_ring_tx_db(sc, txq); - + check_ring_tx_db(sc, txq); + return (0); } else if (tso_info) { int eth_type; ==== //depot/projects/ethng/src/sys/dev/cxgb/sys/uipc_mvec.c#9 (text+ko) ==== @@ -239,10 +239,9 @@ } for (i = 0; i < seg_count; i++) { marray[i]->m_next = marray[i]->m_nextpkt = NULL; - if (marray[i]->m_flags & M_EXT) { - marray[i]->m_flags = 0; + if ((marray[i]->m_flags & (M_EXT|M_NOFREE)) == M_EXT) { + marray[i]->m_flags &= ~M_EXT; m_free(marray[i]); - } } *nsegs = seg_count; @@ -268,19 +267,20 @@ return (ENOMEM); m0->m_type = EXT_IOVEC; } - + + m0->m_flags = 0; mv = mtomv(m0); mv->mv_count = count; mv->mv_first = 0; - for (mp = m, i = 0, mi = &mv->mv_vec[0]; i < count; mp++, segs++, mi++, i++) { + for (mp = m, i = 0, mi = mv->mv_vec; i < count; mp++, segs++, mi++, i++) { busdma_map_mbuf_fast(*mp, segs); _mcl_collapse_mbuf(mi, *mp); } for (mp = m, i = 0; i < count; i++, mp++) { (*mp)->m_next = (*mp)->m_nextpkt = NULL; - if ((*mp)->m_flags & M_EXT) { - (*mp)->m_flags = 0; + if (((*mp)->m_flags & (M_EXT|M_NOFREE)) == M_EXT) { + (*mp)->m_flags &= ~M_EXT; m_free(*mp); } }