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Date:      Tue, 8 Feb 2011 10:10:12 GMT
From:      Takefu <takefu@airport.fm>
To:        freebsd-i386@FreeBSD.org
Subject:   Re: i386/139743: [ichsmb] [patch] ichsmb driver doesn't detects SMB bus on Asus P4B533/P4PE motherboards
Message-ID:  <201102081010.p18AACg9043160@freefall.freebsd.org>

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The following reply was made to PR i386/139743; it has been noted by GNATS.

From: Takefu <takefu@airport.fm>
To: freebsd-gnats-submit@freebsd.org
Cc:  
Subject: Re: i386/139743: [ichsmb] [patch] ichsmb driver doesn't detects SMB
 bus on Asus P4B533/P4PE motherboards
Date: Tue, 08 Feb 2011 19:08:43 +0900

 Hi
 It used it also with 8.2-RC3.
 
 --- pci.c.patch begins here ---
 --- sys/dev/pci/pci.c.orig	2010-12-22 02:09:25.000000000 +0900
 +++ sys/dev/pci/pci.c	2011-02-08 16:16:27.000000000 +0900
 @@ -111,6 +111,7 @@
  			    uint16_t data);
  static void		pci_enable_msix(device_t dev, u_int index,
  			    uint64_t address, uint32_t data);
 +static void		pci_fix_asus_smbus(device_t dev);
  static void		pci_mask_msix(device_t dev, u_int index);
  static void		pci_unmask_msix(device_t dev, u_int index);
  static int		pci_msi_blacklisted(void);
 @@ -188,47 +189,53 @@
  #define	PCI_QUIRK_MAP_REG	1 /* PCI map register in weird place */
  #define	PCI_QUIRK_DISABLE_MSI	2 /* MSI/MSI-X doesn't work */
  #define	PCI_QUIRK_ENABLE_MSI_VM	3 /* Older chipset in VM where MSI works */
 +#define	PCI_QUIRK_FIXUP_ROUTINE 4 /* PCI needs a fix to continue */
  	int	arg1;
  	int	arg2;
 +	void (*fixup_func)(device_t dev);
  };
 
  struct pci_quirk pci_quirks[] = {
  	/* The Intel 82371AB and 82443MX has a map register at offset 0x90. */
 -	{ 0x71138086, PCI_QUIRK_MAP_REG,	0x90,	 0 },
 -	{ 0x719b8086, PCI_QUIRK_MAP_REG,	0x90,	 0 },
 +	{ 0x71138086, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
 +	{ 0x719b8086, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
  	/* As does the Serverworks OSB4 (the SMBus mapping register) */
 -	{ 0x02001166, PCI_QUIRK_MAP_REG,	0x90,	 0 },
 +	{ 0x02001166, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
 +
 +	/* The ASUS P4B-motherboards needs a hack to enable the Intel 801SMBus */
 +	{ 0x24408086, PCI_QUIRK_FIXUP_ROUTINE,	0,	0, &pci_fix_asus_smbus },
 +	{ 0x24C08086, PCI_QUIRK_FIXUP_ROUTINE,	0,	0, &pci_fix_asus_smbus },
 
  	/*
  	 * MSI doesn't work with the ServerWorks CNB20-HE Host Bridge
  	 * or the CMIC-SL (AKA ServerWorks GC_LE).
  	 */
 -	{ 0x00141166, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x00171166, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 +	{ 0x00141166, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x00171166, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
  	/*
  	 * MSI doesn't work on earlier Intel chipsets including
  	 * E7500, E7501, E7505, 845, 865, 875/E7210, and 855.
  	 */
 -	{ 0x25408086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x254c8086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x25508086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x25608086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x25708086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x25788086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 -	{ 0x35808086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 +	{ 0x25408086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x254c8086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x25508086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x25608086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x25708086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x25788086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 +	{ 0x35808086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
  	/*
  	 * MSI doesn't work with devices behind the AMD 8131 HT-PCIX
  	 * bridge.
  	 */
 -	{ 0x74501022, PCI_QUIRK_DISABLE_MSI,	0,	0 },
 +	{ 0x74501022, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
  	/*
  	 * Some virtualization environments emulate an older chipset
  	 * but support MSI just fine.  QEMU uses the Intel 82440.
  	 */
 -	{ 0x12378086, PCI_QUIRK_ENABLE_MSI_VM,	0,	0 },
 +	{ 0x12378086, PCI_QUIRK_ENABLE_MSI_VM,	0,	0, NULL },
 
  	{ 0 }
  };
 @@ -435,6 +442,27 @@
  		cfg->hdrtype = 1;
  }
 
 +/* asus p4b/p4pe hack */
 +
 +static void
 +pci_fix_asus_smbus(device_t dev)
 +{
 +	int	pmccfg;
 +
 +	/* read subsystem vendor-id */
 +	pmccfg = pci_read_config(dev, 0xF2, 2);
 +	printf(" [-] pmccfg: %.4x\n",pmccfg);
 +	if( pmccfg & 0x8 ){
 +	    pmccfg &= ~0x8;
 +	    pci_write_config(dev, 0xF2, pmccfg, 2);
 +	    pmccfg = pci_read_config(dev, 0xF2, 2);
 +	    if( pmccfg & 0x8 )
 +		printf("Could not enable Intel 801SMBus!\n");
 +	    else
 +		printf("Enabled Intel 801SMBus\n");
 +	}
 +}
 +
  /* extract header type specific config data */
 
  static void
 @@ -2790,9 +2818,12 @@
  	 * Add additional, quirked resources.
  	 */
  	for (q = &pci_quirks[0]; q->devid; q++) {
 -		if (q->devid == ((cfg->device << 16) | cfg->vendor)
 -		    && q->type == PCI_QUIRK_MAP_REG)
 -			pci_add_map(bus, dev, q->arg1, rl, force, 0);
 +		if (q->devid == ((cfg->device << 16) | cfg->vendor) ){
 +		    if( q->type == PCI_QUIRK_MAP_REG )
 +			pci_add_map(pcib, bus, dev, b, s, f, q->arg1, rl, force, 0);
 +		    else if( q->type == PCI_QUIRK_FIXUP_ROUTINE )
 +			q->fixup_func(dev);
 +		}
  	}
 
  	if (cfg->intpin > 0 && PCI_INTERRUPT_VALID(cfg->intline)) {
 --- pci.c.patch ends here ---
 



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