From owner-svn-src-all@freebsd.org Thu Sep 19 17:17:31 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 2643312922A; Thu, 19 Sep 2019 17:17:31 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46Z3SW09Hvz41tj; Thu, 19 Sep 2019 17:17:31 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D977E18AC0; Thu, 19 Sep 2019 17:17:30 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x8JHHUsm007466; Thu, 19 Sep 2019 17:17:30 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x8JHHTFv007462; Thu, 19 Sep 2019 17:17:29 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201909191717.x8JHHTFv007462@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Thu, 19 Sep 2019 17:17:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r352522 - in vendor/llvm/dist-release_90: include/llvm/IR lib/CodeGen lib/IR lib/Target/X86 lib/Transforms/Utils X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/llvm/dist-release_90: include/llvm/IR lib/CodeGen lib/IR lib/Target/X86 lib/Transforms/Utils X-SVN-Commit-Revision: 352522 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Sep 2019 17:17:31 -0000 Author: dim Date: Thu Sep 19 17:17:29 2019 New Revision: 352522 URL: https://svnweb.freebsd.org/changeset/base/352522 Log: Vendor import of llvm 9.0.0 release r372316: https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_900/final@372316 Modified: vendor/llvm/dist-release_90/include/llvm/IR/Instructions.h vendor/llvm/dist-release_90/lib/CodeGen/IfConversion.cpp vendor/llvm/dist-release_90/lib/IR/Instructions.cpp vendor/llvm/dist-release_90/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist-release_90/lib/Transforms/Utils/SimplifyLibCalls.cpp Modified: vendor/llvm/dist-release_90/include/llvm/IR/Instructions.h ============================================================================== --- vendor/llvm/dist-release_90/include/llvm/IR/Instructions.h Thu Sep 19 16:54:34 2019 (r352521) +++ vendor/llvm/dist-release_90/include/llvm/IR/Instructions.h Thu Sep 19 17:17:29 2019 (r352522) @@ -3938,6 +3938,9 @@ class CallBrInst : public CallBase { ArrayRef IndirectDests, ArrayRef Args, ArrayRef Bundles, const Twine &NameStr); + /// Should the Indirect Destinations change, scan + update the Arg list. + void updateArgBlockAddresses(unsigned i, BasicBlock *B); + /// Compute the number of operands to allocate. static int ComputeNumOperands(int NumArgs, int NumIndirectDests, int NumBundleInputs = 0) { @@ -4075,7 +4078,7 @@ class CallBrInst : public CallBase { return cast(*(&Op<-1>() - getNumIndirectDests() - 1)); } BasicBlock *getIndirectDest(unsigned i) const { - return cast(*(&Op<-1>() - getNumIndirectDests() + i)); + return cast_or_null(*(&Op<-1>() - getNumIndirectDests() + i)); } SmallVector getIndirectDests() const { SmallVector IndirectDests; @@ -4087,6 +4090,7 @@ class CallBrInst : public CallBase { *(&Op<-1>() - getNumIndirectDests() - 1) = reinterpret_cast(B); } void setIndirectDest(unsigned i, BasicBlock *B) { + updateArgBlockAddresses(i, B); *(&Op<-1>() - getNumIndirectDests() + i) = reinterpret_cast(B); } @@ -4096,11 +4100,10 @@ class CallBrInst : public CallBase { return i == 0 ? getDefaultDest() : getIndirectDest(i - 1); } - void setSuccessor(unsigned idx, BasicBlock *NewSucc) { - assert(idx < getNumIndirectDests() + 1 && + void setSuccessor(unsigned i, BasicBlock *NewSucc) { + assert(i < getNumIndirectDests() + 1 && "Successor # out of range for callbr!"); - *(&Op<-1>() - getNumIndirectDests() -1 + idx) = - reinterpret_cast(NewSucc); + return i == 0 ? setDefaultDest(NewSucc) : setIndirectDest(i - 1, NewSucc); } unsigned getNumSuccessors() const { return getNumIndirectDests() + 1; } Modified: vendor/llvm/dist-release_90/lib/CodeGen/IfConversion.cpp ============================================================================== --- vendor/llvm/dist-release_90/lib/CodeGen/IfConversion.cpp Thu Sep 19 16:54:34 2019 (r352521) +++ vendor/llvm/dist-release_90/lib/CodeGen/IfConversion.cpp Thu Sep 19 17:17:29 2019 (r352522) @@ -912,6 +912,12 @@ void IfConverter::AnalyzeBranches(BBInfo &BBI) { BBI.BrCond.clear(); BBI.IsBrAnalyzable = !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); + if (!BBI.IsBrAnalyzable) { + BBI.TrueBB = nullptr; + BBI.FalseBB = nullptr; + BBI.BrCond.clear(); + } + SmallVector RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); BBI.IsBrReversible = (RevCond.size() == 0) || !TII->reverseBranchCondition(RevCond); @@ -1758,9 +1764,15 @@ bool IfConverter::IfConvertDiamondCommon( if (!BBI1->IsBrAnalyzable) verifySameBranchInstructions(&MBB1, &MBB2); #endif - BBI1->NonPredSize -= TII->removeBranch(*BBI1->BB); - // Remove duplicated instructions. + // Remove duplicated instructions from the tail of MBB1: any branch + // instructions, and the common instructions counted by NumDups2. DI1 = MBB1.end(); + while (DI1 != MBB1.begin()) { + MachineBasicBlock::iterator Prev = std::prev(DI1); + if (!Prev->isBranch() && !Prev->isDebugInstr()) + break; + DI1 = Prev; + } for (unsigned i = 0; i != NumDups2; ) { // NumDups2 only counted non-dbg_value instructions, so this won't // run off the head of the list. Modified: vendor/llvm/dist-release_90/lib/IR/Instructions.cpp ============================================================================== --- vendor/llvm/dist-release_90/lib/IR/Instructions.cpp Thu Sep 19 16:54:34 2019 (r352521) +++ vendor/llvm/dist-release_90/lib/IR/Instructions.cpp Thu Sep 19 17:17:29 2019 (r352522) @@ -822,6 +822,17 @@ void CallBrInst::init(FunctionType *FTy, Value *Fn, Ba setName(NameStr); } +void CallBrInst::updateArgBlockAddresses(unsigned i, BasicBlock *B) { + assert(getNumIndirectDests() > i && "IndirectDest # out of range for callbr"); + if (BasicBlock *OldBB = getIndirectDest(i)) { + BlockAddress *Old = BlockAddress::get(OldBB); + BlockAddress *New = BlockAddress::get(B); + for (unsigned ArgNo = 0, e = getNumArgOperands(); ArgNo != e; ++ArgNo) + if (dyn_cast(getArgOperand(ArgNo)) == Old) + setArgOperand(ArgNo, New); + } +} + CallBrInst::CallBrInst(const CallBrInst &CBI) : CallBase(CBI.Attrs, CBI.FTy, CBI.getType(), Instruction::CallBr, OperandTraits::op_end(this) - CBI.getNumOperands(), Modified: vendor/llvm/dist-release_90/lib/Target/X86/X86ISelLowering.cpp ============================================================================== --- vendor/llvm/dist-release_90/lib/Target/X86/X86ISelLowering.cpp Thu Sep 19 16:54:34 2019 (r352521) +++ vendor/llvm/dist-release_90/lib/Target/X86/X86ISelLowering.cpp Thu Sep 19 17:17:29 2019 (r352522) @@ -7650,17 +7650,22 @@ static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayR // IsConsecutiveLoadWithZeros - we need to create a shuffle of the loaded // vector and a zero vector to clear out the zero elements. if (!isAfterLegalize && VT.isVector()) { - SmallVector ClearMask(NumElems, -1); - for (unsigned i = 0; i < NumElems; ++i) { - if (ZeroMask[i]) - ClearMask[i] = i + NumElems; - else if (LoadMask[i]) - ClearMask[i] = i; + unsigned NumMaskElts = VT.getVectorNumElements(); + if ((NumMaskElts % NumElems) == 0) { + unsigned Scale = NumMaskElts / NumElems; + SmallVector ClearMask(NumMaskElts, -1); + for (unsigned i = 0; i < NumElems; ++i) { + if (UndefMask[i]) + continue; + int Offset = ZeroMask[i] ? NumMaskElts : 0; + for (unsigned j = 0; j != Scale; ++j) + ClearMask[(i * Scale) + j] = (i * Scale) + j + Offset; + } + SDValue V = CreateLoad(VT, LDBase); + SDValue Z = VT.isInteger() ? DAG.getConstant(0, DL, VT) + : DAG.getConstantFP(0.0, DL, VT); + return DAG.getVectorShuffle(VT, DL, V, Z, ClearMask); } - SDValue V = CreateLoad(VT, LDBase); - SDValue Z = VT.isInteger() ? DAG.getConstant(0, DL, VT) - : DAG.getConstantFP(0.0, DL, VT); - return DAG.getVectorShuffle(VT, DL, V, Z, ClearMask); } } @@ -31664,8 +31669,8 @@ static bool matchUnaryPermuteShuffle(MVT MaskVT, Array if (!ContainsZeros && AllowIntDomain && MaskScalarSizeInBits == 16) { SmallVector RepeatedMask; if (is128BitLaneRepeatedShuffleMask(MaskEltVT, Mask, RepeatedMask)) { - ArrayRef LoMask(Mask.data() + 0, 4); - ArrayRef HiMask(Mask.data() + 4, 4); + ArrayRef LoMask(RepeatedMask.data() + 0, 4); + ArrayRef HiMask(RepeatedMask.data() + 4, 4); // PSHUFLW: permute lower 4 elements only. if (isUndefOrInRange(LoMask, 0, 4) && Modified: vendor/llvm/dist-release_90/lib/Transforms/Utils/SimplifyLibCalls.cpp ============================================================================== --- vendor/llvm/dist-release_90/lib/Transforms/Utils/SimplifyLibCalls.cpp Thu Sep 19 16:54:34 2019 (r352521) +++ vendor/llvm/dist-release_90/lib/Transforms/Utils/SimplifyLibCalls.cpp Thu Sep 19 17:17:29 2019 (r352522) @@ -1480,8 +1480,8 @@ Value *LibCallSimplifier::optimizePow(CallInst *Pow, I if (match(Expo, m_SpecificFP(-1.0))) return B.CreateFDiv(ConstantFP::get(Ty, 1.0), Base, "reciprocal"); - // pow(x, 0.0) -> 1.0 - if (match(Expo, m_SpecificFP(0.0))) + // pow(x, +/-0.0) -> 1.0 + if (match(Expo, m_AnyZeroFP())) return ConstantFP::get(Ty, 1.0); // pow(x, 1.0) -> x