Date: Fri, 20 Aug 2010 00:48:49 +0800 From: Adrian Chadd <adrian.chadd@gmail.com> To: freebsd-mips@freebsd.org Subject: Re: WIP: AR91XX (and AR724X, maybe) support Message-ID: <AANLkTim_Gux6x=6i6wfVr5w1BOn8rTYzD6=osVH7=iri@mail.gmail.com> In-Reply-To: <AANLkTimG9-2_GntxmTQAiKYUN4XmJYHp-OFEJKcSrJwE@mail.gmail.com> References: <AANLkTi=xyR8RVRjHBs-2qU8-WodHVysmmE=H66f7DfEi@mail.gmail.com> <AANLkTikf0W2Scy1zgRk4u9GT8donG0yNw1R_p8SSxoAs@mail.gmail.com> <AANLkTimG9-2_GntxmTQAiKYUN4XmJYHp-OFEJKcSrJwE@mail.gmail.com>
next in thread | previous in thread | raw e-mail | index | archive | help
I've just committed the PLL cpu ops for the AR71xx and AR91xx. i've done some light testing on both. The AR9132 in this TL-1043ND has arge0 wired to the RTL8366 switch which, thankfully, seems to have been programmed on poweron. Forcing it to 1000/full in hints and setting the phymask so the PHY check is bypassed made it work. Adrian
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?AANLkTim_Gux6x=6i6wfVr5w1BOn8rTYzD6=osVH7=iri>