From owner-freebsd-arm@FreeBSD.ORG Fri Dec 8 03:51:02 2006 Return-Path: X-Original-To: freebsd-arm@freebsd.org Delivered-To: freebsd-arm@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 7C6F116A416 for ; Fri, 8 Dec 2006 03:51:02 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (vc4-2-0-87.dsl.netrack.net [199.45.160.85]) by mx1.FreeBSD.org (Postfix) with ESMTP id 9A15243CA6 for ; Fri, 8 Dec 2006 03:50:06 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from localhost (localhost [127.0.0.1]) by harmony.bsdimp.com (8.13.4/8.13.4) with ESMTP id kB83nE40028522; Thu, 7 Dec 2006 20:49:14 -0700 (MST) (envelope-from imp@bsdimp.com) Date: Thu, 07 Dec 2006 20:50:08 -0700 (MST) Message-Id: <20061207.205008.-432839162.imp@bsdimp.com> To: ticso@cicely.de, ticso@cicely12.cicely.de From: "M. Warner Losh" In-Reply-To: <20061208015032.GF54209@cicely12.cicely.de> References: <20061208015032.GF54209@cicely12.cicely.de> X-Mailer: Mew version 4.2 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-2.0 (harmony.bsdimp.com [127.0.0.1]); Thu, 07 Dec 2006 20:49:14 -0700 (MST) Cc: freebsd-arm@freebsd.org Subject: Re: questions about current RM9200 state X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Dec 2006 03:51:02 -0000 In message: <20061208015032.GF54209@cicely12.cicely.de> Bernd Walter writes: : This is with P4 Source and an SD card inserted: : >e 0x20000000 which bootloader? The bootloader is responsible for setting up some things, and maybe the version you are using doesn't set them all up. It is a longshot since I think that the board init code does setup the sd/mmc bus by default. : at91_mci0: Setting controller bus width to 1 : at91_mci0: Setting controller bus width to 1 : at91_mci0: Setting controller bus width to 1 : at91_mci0: Setting controller bus width to 1 : mmc0: setting transfer rate to 30.000MHz : at91_mci0: Setting controller bus width to 1 : Sending DHCP Discover packet from interface ate0 (00:0e:42:02:00:21) : [...] : : No SD card found it seems. Is it an SD card and not an MMC card? We'll need to add some debug to see why this is the case. It should find it. It may not detect the new SDHC cards, but since those are expensive, that's a long shot. : About TWI - hinted devices are listed, but I havn't tested if they : really work yet. They should. I'm reading/writing the iic eeproms now. : But I can't probe the bus from userland: : [56]arm9# ./iic_probe /dev/iic0 : - and nothing listed. twi doesn't support START/STOP ioctls that you use. Hmmm, that's in p4 that I've removed them because I never got that working. I also think the version in -head isn't the latest, working one. I think you do the same thing with a 0 byte transfer. Except we don't detect NOACK quite right yet, I'm afraid. I'd expect an error each time you tried. : error = ioctl(bus, I2CSTART, &cmd); : if (!error) { : printf("device %i exists\n", i); : ioctl(bus, I2CSTOP, NULL); : } : May I want to get rid of at91_rtc0, since we have DS1672 driver support? at91_rtc0 is about useless, since it resets every single time the core resets. : How can I find out which clock is active? I'm unsure. : Shouldn't it keep the time with at91_rtc0 over a simple reboot as well? No. The hardware resets to 1998 every time the core resets. : At least the time did not survive a reboot. Yea. I thought it would too, but careful study says 'no'. Warner