Date: Wed, 23 May 2012 08:28:54 -0600 From: Warner Losh <imp@bsdimp.com> To: Svatopluk Kraus <onwahe@gmail.com> Cc: freebsd-arm@FreeBSD.org, hackers@FreeBSD.org, Alexander Kabaev <kabaev@gmail.com>, Richard Hodges <richard@hodges.org> Subject: Re: ARM + CACHE_LINE_SIZE + DMA Message-ID: <CF4E9BBA-B490-4D1F-975C-9EB52F96BF38@bsdimp.com> In-Reply-To: <CAFHCsPV=M9CadamhUpAVsBMJehr4ehgChs8brCQOdEFVB=9rbA@mail.gmail.com> References: <CAFHCsPUdZXGKFvmVGgaEUsfhwd28mNVGaY84ExcJp=ogQxzPJQ@mail.gmail.com> <1337285248.1503.308.camel@revolution.hippie.lan> <CAFHCsPVxkhNfiTQp7gvjfonfTjoG-28RgNrG=%2BdxbGhzxqY%2BDg@mail.gmail.com> <1337617221.2516.38.camel@revolution.hippie.lan> <CAFHCsPV=M9CadamhUpAVsBMJehr4ehgChs8brCQOdEFVB=9rbA@mail.gmail.com>
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Hi Svatopluk, That looks very interesting. You may be interested in the efforts of various people to bring up the = armv6 multi-core boards. You can checkout the source from = http://svn.freebsd.org/base/projects/armv6 to see where we are in that = effort. I believe that many of these issues have been addressed. = Perhaps you could take a look and contribute to any areas that are = incomplete rather than starting from scratch? Hope you are doing well! We need more people that truly understand the = ARM cache issues. Warner On May 23, 2012, at 7:13 AM, Svatopluk Kraus wrote: > Hi, >=20 > with respect to your replies and among other things, the following > summary could be made: >=20 > There are three kinds of DMA buffers according to their origin: >=20 > 1. driver buffers > As Alexander wrote, the buffers should be allocated by > bus_dmamap_alloc(). The function should be implemented to allocate the > buffers correctly aligned with help of bus_dma_tag_t. For these > buffers, we can avoid bouncing totally just by correct driver > implementation. For badly implemented drivers, bouncing penalty is > paid in case of unaligned buffers. For BUS_DMA_COHERENT allocations, > as Mark wrote, an allocation pool of coherent pages is good > optimalization. >=20 > 2. well-known system buffers > Mbufs and vfs buffers. The buffers should be aligned on > CACHE_LINE_SIZE (start and size). > It should be enough for vfs buffers as they are carring data only and > only whole buffers should be accessed by DMA. The mbuf is a structure > and data can be carried on three possible locations. The first one, > the external buffer, should be aligned on CACHE_LINE_SIZE. The next > two locations, which are parts of the mbuf structure, could be > unaligned in general. If we assume that no one else is writing any > part of the mbuf during DMA access, we can set BUS_DMA_UNALIGNED_SAFE > flag in mbuf load functions. I.e., we don't bounce unaligned buffers > if the flag is set in dmamap. A tunable can be implemented to suppres > the flag for debugging purposes. >=20 > 3. other buffers > As we know nothing about these buffers, we must always bounce = unaligned ones. >=20 > Just two more notes. The DMA buffer should not be access by anyone > (except DMA itself) after PRESYNC and before POSTSYNC. For DMA > descriptors (for example), using bus_dmamap_alloc() with > BUS_DMA_COHERENT flag could be inevitable. >=20 > As I'm implementing bus dma for ARM11mpcore, I'm doing it with next = assumptions: > 1. ARMv6k and higher > 2. PIPT data cache > 3. SMP ready >=20 > Svata > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" >=20 >=20
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