Date: Sat, 20 Oct 2007 00:48:45 GMT From: Kip Macy <kmacy@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 127805 for review Message-ID: <200710200048.l9K0mj9h019338@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=127805 Change 127805 by kmacy@kmacy_home:ethng on 2007/10/20 00:48:10 add cxio_hal.c to iw_cxgb build Affected files ... .. //depot/projects/ethng/src/sys/dev/cxgb/common/cxgb_ctl_defs.h#3 edit .. //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cxio_hal.c#1 add .. //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cxio_hal.h#2 edit .. //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cxio_resource.h#1 add .. //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_iwch_cm.h#3 edit .. //depot/projects/ethng/src/sys/modules/cxgb/iw_cxgb/Makefile#3 edit Differences ... ==== //depot/projects/ethng/src/sys/dev/cxgb/common/cxgb_ctl_defs.h#3 (text+ko) ==== @@ -125,7 +125,7 @@ unsigned int rqt_top; /* RQT last entry address */ unsigned int udbell_len; /* user doorbell region length */ unsigned long udbell_physbase; /* user doorbell physical start addr */ - void volatile *kdb_addr; /* kernel doorbell register address */ + void *kdb_addr; /* kernel doorbell register address */ struct pci_dev *pdev; /* associated PCI device */ }; ==== //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cxio_hal.h#2 (text+ko) ==== @@ -2,6 +2,7 @@ #ifndef __CXIO_HAL_H__ #define __CXIO_HAL_H__ +#include <sys/condvar.h> #define T3_CTRL_QP_ID FW_RI_SGEEC_START #define T3_CTL_QP_TID FW_RI_TID_START @@ -25,8 +26,8 @@ u32 wptr; u32 rptr; struct mtx lock; /* for the wtpr, can sleep */ -#ifdef notyet - wait_queue_head_t waitq;/* wait for RspQ/CQE msg */ + struct cv waitq;/* wait for RspQ/CQE msg */ +#ifdef notyet DECLARE_PCI_UNMAP_ADDR(mapping) #endif union t3_wr *workq; /* the work request queue */ @@ -45,13 +46,13 @@ spinlock_t pdid_fifo_lock; }; -struct cxio_qpid_list { - TAILQ_ENTRY(cxio_qpid_list) entry; +struct cxio_qpid { + TAILQ_ENTRY(cxio_qpid) entry; u32 qpid; }; struct cxio_ucontext { - TAILQ_ENTRY(cxio_ucontext) entry; + TAILQ_HEAD(, cxio_qpid) qpids; struct mtx lock; }; @@ -69,6 +70,7 @@ struct cxio_ucontext uctx; struct gen_pool *pbl_pool; struct gen_pool *rqt_pool; + struct ifnet *ifp; TAILQ_ENTRY(cxio_rdev) entry; }; @@ -157,4 +159,47 @@ void cxio_dump_tcb(struct cxio_rdev *rdev, u32 hwtid); #endif + + static unsigned char hiBitSetTab[] = { + 0, 1, 2, 2, 3, 3, 3, 3, + 4, 4, 4, 4, 4, 4, 4, 4, + 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7 + +}; + + +static __inline +int ilog2(unsigned long val) +{ + unsigned long tmp; + + tmp = val >> 24; + if (tmp) { + return hiBitSetTab[tmp] + 23; + } + tmp = (val >> 16) & 0xff; + if (tmp) { + return hiBitSetTab[tmp] + 15; + } + tmp = (val >> 8) & 0xff; + if (tmp) { + return hiBitSetTab[tmp] + 7; + + } + return hiBitSetTab[val & 0xff] - 1; +} + #endif ==== //depot/projects/ethng/src/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_iwch_cm.h#3 (text+ko) ==== @@ -172,14 +172,26 @@ return wscale; } -static void +static __inline void wait_event(struct cv *cv, struct mtx *lock) { mtx_lock(lock); cv_wait_unlock(cv, lock); } -static void +static __inline int +wait_event_interruptible(struct cv *cv, struct mtx *lock) +{ + int err; + + mtx_lock(lock); + err = cv_wait_sig(cv, lock); + mtx_unlock(lock); + + return (err); +} + +static __inline void wake_up(struct cv *cv, struct mtx *lock) { mtx_lock(lock); ==== //depot/projects/ethng/src/sys/modules/cxgb/iw_cxgb/Makefile#3 (text+ko) ==== @@ -4,7 +4,8 @@ .PATH: ${IW_CXGB} ${CXGB}/common ${CXGB}/ulp/iw_cxgb KMOD= iw_cxgb -SRCS= iw_cxgb_iwch.c iw_cxgb_iwch_cm.c bus_if.h device_if.h opt_sched.h pci_if.h +SRCS= iw_cxgb_iwch.c iw_cxgb_iwch_cm.c iw_cxgb_cxio_hal.c +SRCS+= bus_if.h device_if.h opt_sched.h pci_if.h pcib_if.h CFLAGS+= -DCONFIG_CHELSIO_T3_CORE -g -DCONFIG_DEFINED -I${CXGB} -DSMP .include <bsd.kmod.mk>
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200710200048.l9K0mj9h019338>