From owner-svn-src-all@freebsd.org Fri Aug 10 03:28:41 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2C1A9105794B; Fri, 10 Aug 2018 03:28:41 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id D30A875C19; Fri, 10 Aug 2018 03:28:40 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id B439B22961; Fri, 10 Aug 2018 03:28:40 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w7A3SecG067472; Fri, 10 Aug 2018 03:28:40 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w7A3Sebe067471; Fri, 10 Aug 2018 03:28:40 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201808100328.w7A3Sebe067471@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Fri, 10 Aug 2018 03:28:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r337562 - head/sys/powerpc/powerpc X-SVN-Group: head X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: head/sys/powerpc/powerpc X-SVN-Commit-Revision: 337562 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Aug 2018 03:28:41 -0000 Author: jhibbits Date: Fri Aug 10 03:28:40 2018 New Revision: 337562 URL: https://svnweb.freebsd.org/changeset/base/337562 Log: powerpc: Add lwsync and ptesync 'sync' opcode variants to ddb disassembler The canonical form of sync is: sync L, E (if Category Elemental Memory Barriers implemented) The L bits (2) denote the type of sync: 0 -- hwsync 1 -- lwsync 2 -- ptesync or hwsync It's been found that most 32-bit CPUs designed prior to the introduction of lwsync will ignore the L bits. However, some cores, particularly the e500 core, will trigger an illegal instruction exception. Adding these variants will make it easier to see which sync variant is actually being used in case of a trap. Modified: head/sys/powerpc/powerpc/db_disasm.c Modified: head/sys/powerpc/powerpc/db_disasm.c ============================================================================== --- head/sys/powerpc/powerpc/db_disasm.c Fri Aug 10 01:43:05 2018 (r337561) +++ head/sys/powerpc/powerpc/db_disasm.c Fri Aug 10 03:28:40 2018 (r337562) @@ -310,7 +310,9 @@ const struct opcode opcodes_1f[] = { { "lfsux", 0xfc0007fe, 0x7c00046e, Op_D | Op_A | Op_B }, { "mfsr", 0xfc0007fe, 0x7c0004a6, Op_D | Op_SR }, { "lswi", 0xfc0007fe, 0x7c0004aa, Op_D | Op_A | Op_NB }, - { "sync", 0xfc0007fe, 0x7c0004ac, 0 }, + { "sync", 0xfc6007fe, 0x7c0004ac, 0 }, + { "lwsync", 0xfc6007fe, 0x7c2004ac, 0 }, + { "ptesync", 0xfc6007fe, 0x7c4004ac, 0 }, { "lfdx", 0xfc0007fe, 0x7c0004ae, Op_D | Op_A | Op_B }, { "lfdux", 0xfc0007fe, 0x7c0004ee, Op_D | Op_A | Op_B }, { "mfsrin", 0xfc0007fe, 0x7c000526, Op_D | Op_B },