Date: Mon, 7 Nov 2016 11:01:09 +0000 (UTC) From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r308408 - head/sys/arm/arm Message-ID: <201611071101.uA7B19js089174@repo.freebsd.org>
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Author: andrew Date: Mon Nov 7 11:01:09 2016 New Revision: 308408 URL: https://svnweb.freebsd.org/changeset/base/308408 Log: Include machine/armreg.h after machine/asm.h to ensure __ARM_ARCH is defined. MFC after: 1 week Sponsored by: ABT Systems Ltd Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S head/sys/arm/arm/cpufunc_asm_xscale.S head/sys/arm/arm/cpufunc_asm_xscale_c3.S head/sys/arm/arm/fiq_subr.S head/sys/arm/arm/setstack.s Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_sheeva.S Mon Nov 7 10:55:56 2016 (r308407) +++ head/sys/arm/arm/cpufunc_asm_sheeva.S Mon Nov 7 11:01:09 2016 (r308408) @@ -29,10 +29,10 @@ * SUCH DAMAGE. */ -#include <machine/armreg.h> #include <machine/asm.h> __FBSDID("$FreeBSD$"); +#include <machine/armreg.h> #include <machine/param.h> .Lsheeva_cache_line_size: Modified: head/sys/arm/arm/cpufunc_asm_xscale.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_xscale.S Mon Nov 7 10:55:56 2016 (r308407) +++ head/sys/arm/arm/cpufunc_asm_xscale.S Mon Nov 7 11:01:09 2016 (r308408) @@ -71,10 +71,11 @@ * * XScale assembly functions for CPU / MMU / TLB specific operations */ -#include <machine/armreg.h> #include <machine/asm.h> __FBSDID("$FreeBSD$"); +#include <machine/armreg.h> + /* * Size of the XScale core D-cache. */ Modified: head/sys/arm/arm/cpufunc_asm_xscale_c3.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_xscale_c3.S Mon Nov 7 10:55:56 2016 (r308407) +++ head/sys/arm/arm/cpufunc_asm_xscale_c3.S Mon Nov 7 11:01:09 2016 (r308408) @@ -73,10 +73,11 @@ * XScale core 3 assembly functions for CPU / MMU / TLB specific operations */ -#include <machine/armreg.h> #include <machine/asm.h> __FBSDID("$FreeBSD$"); +#include <machine/armreg.h> + /* * Size of the XScale core D-cache. */ Modified: head/sys/arm/arm/fiq_subr.S ============================================================================== --- head/sys/arm/arm/fiq_subr.S Mon Nov 7 10:55:56 2016 (r308407) +++ head/sys/arm/arm/fiq_subr.S Mon Nov 7 11:01:09 2016 (r308408) @@ -37,10 +37,11 @@ */ -#include <machine/armreg.h> #include <machine/asm.h> __FBSDID("$FreeBSD$"); +#include <machine/armreg.h> + /* * MODE_CHANGE_NOP should be inserted between a mode change and a * banked register (R8--R15) access. Modified: head/sys/arm/arm/setstack.s ============================================================================== --- head/sys/arm/arm/setstack.s Mon Nov 7 10:55:56 2016 (r308407) +++ head/sys/arm/arm/setstack.s Mon Nov 7 11:01:09 2016 (r308408) @@ -48,10 +48,11 @@ * */ -#include <machine/armreg.h> #include <machine/asm.h> __FBSDID("$FreeBSD$"); +#include <machine/armreg.h> + /* To set the stack pointer for a particular mode we must switch * to that mode update the banked r13 and then switch back. * This routine provides an easy way of doing this for any mode
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