Date: Mon, 16 Dec 2013 10:50:13 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r259462 - head/sys/dev/usb/controller Message-ID: <201312161050.rBGAoDYk085134@svn.freebsd.org>
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Author: hselasky Date: Mon Dec 16 10:50:13 2013 New Revision: 259462 URL: http://svnweb.freebsd.org/changeset/base/259462 Log: Fix regression issue after r259248: Some Intel XHCI controlles timeout processing so-called "TRBs" when the final LINK TRB of a so-called "TD" has the CHAIN-BIT set. MFC after: 1 week Tested by: glebius @ Modified: head/sys/dev/usb/controller/xhci.c Modified: head/sys/dev/usb/controller/xhci.c ============================================================================== --- head/sys/dev/usb/controller/xhci.c Mon Dec 16 09:48:08 2013 (r259461) +++ head/sys/dev/usb/controller/xhci.c Mon Dec 16 10:50:13 2013 (r259462) @@ -1942,6 +1942,8 @@ restart: /* remove chain bit because this is the last data TRB in the chain */ td->td_trb[td->ntrb - 1].dwTrb2 &= ~htole32(XHCI_TRB_2_TDSZ_SET(15)); td->td_trb[td->ntrb - 1].dwTrb3 &= ~htole32(XHCI_TRB_3_CHAIN_BIT); + /* remove CHAIN-BIT from last LINK TRB */ + td->td_trb[td->ntrb].dwTrb3 &= ~htole32(XHCI_TRB_3_CHAIN_BIT); usb_pc_cpu_flush(td->page_cache);
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