Date: Wed, 16 May 2018 11:06:39 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r333671 - stable/11/sys/amd64/amd64 Message-ID: <201805161106.w4GB6dx5021254@repo.freebsd.org>
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Author: kib Date: Wed May 16 11:06:39 2018 New Revision: 333671 URL: https://svnweb.freebsd.org/changeset/base/333671 Log: MFC r333404, r333405: Remove PG_U from the recursive pte for kernel pmap' PML4 page and from the rest of the kernel pmap ptes. Approved by: re (marius) Modified: stable/11/sys/amd64/amd64/pmap.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/amd64/amd64/pmap.c ============================================================================== --- stable/11/sys/amd64/amd64/pmap.c Wed May 16 10:08:50 2018 (r333670) +++ stable/11/sys/amd64/amd64/pmap.c Wed May 16 11:06:39 2018 (r333671) @@ -951,8 +951,7 @@ create_pagetables(vm_paddr_t *firstaddr) /* And connect up the PD to the PDP (leaving room for L4 pages) */ pdp_p = (pdp_entry_t *)(KPDPphys + ptoa(KPML4I - KPML4BASE)); for (i = 0; i < nkpdpe; i++) - pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V | - PG_U; + pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V; /* * Now, set up the direct map region using 2MB and/or 1GB pages. If @@ -978,24 +977,24 @@ create_pagetables(vm_paddr_t *firstaddr) } for (j = 0; i < ndmpdp; i++, j++) { pdp_p[i] = DMPDphys + ptoa(j); - pdp_p[i] |= X86_PG_RW | X86_PG_V | PG_U; + pdp_p[i] |= X86_PG_RW | X86_PG_V; } /* And recursively map PML4 to itself in order to get PTmap */ p4_p = (pml4_entry_t *)KPML4phys; p4_p[PML4PML4I] = KPML4phys; - p4_p[PML4PML4I] |= X86_PG_RW | X86_PG_V | PG_U | pg_nx; + p4_p[PML4PML4I] |= X86_PG_RW | X86_PG_V | pg_nx; /* Connect the Direct Map slot(s) up to the PML4. */ for (i = 0; i < ndmpdpphys; i++) { p4_p[DMPML4I + i] = DMPDPphys + ptoa(i); - p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V | PG_U; + p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V; } /* Connect the KVA slots up to the PML4 */ for (i = 0; i < NKPML4E; i++) { p4_p[KPML4BASE + i] = KPDPphys + ptoa(i); - p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V | PG_U; + p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V; } } @@ -2564,11 +2563,11 @@ pmap_pinit_pml4(vm_page_t pml4pg) /* Wire in kernel global address entries. */ for (i = 0; i < NKPML4E; i++) { pm_pml4[KPML4BASE + i] = (KPDPphys + ptoa(i)) | X86_PG_RW | - X86_PG_V | PG_U; + X86_PG_V; } for (i = 0; i < ndmpdpphys; i++) { pm_pml4[DMPML4I + i] = (DMPDPphys + ptoa(i)) | X86_PG_RW | - X86_PG_V | PG_U; + X86_PG_V; } /* install self-referential address mapping entry(s) */
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