From owner-freebsd-current@FreeBSD.ORG Sun May 9 17:41:16 2004 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id CE0BC16A4CE; Sun, 9 May 2004 17:41:16 -0700 (PDT) Received: from sccrmhc11.comcast.net (sccrmhc11.comcast.net [204.127.202.55]) by mx1.FreeBSD.org (Postfix) with ESMTP id 48BB143D5C; Sun, 9 May 2004 17:41:14 -0700 (PDT) (envelope-from julian@elischer.org) Received: from interjet.elischer.org ([24.7.73.28]) by comcast.net (sccrmhc11) with ESMTP id <2004051000411201100k9k50e>; Mon, 10 May 2004 00:41:13 +0000 Received: from localhost (localhost.elischer.org [127.0.0.1]) by InterJet.elischer.org (8.9.1a/8.9.1) with ESMTP id RAA25328; Sun, 9 May 2004 17:41:11 -0700 (PDT) Date: Sun, 9 May 2004 17:41:09 -0700 (PDT) From: Julian Elischer To: Brian Fundakowski Feldman In-Reply-To: <200405092358.i49Nw6TJ019581@green.homeunix.org> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII cc: FreeBSD current users Subject: Re: sparc64 kernel code question.. X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 May 2004 00:41:16 -0000 On Sun, 9 May 2004, Brian Fundakowski Feldman wrote: > Julian Elischer wrote: > > > > in vm_machdep.c the sparc64 code has > > void > > cpu_sched_exit(struct thread *td) > > { [..] > > This is the only architecture that has this.. > > What does it do? And what does it have to do with the scheduler? > > It would appear to detach the vmspace in question from other executing CPUs. > This makes no sense -- how would other CPUs be executing on that vmspace if > it's already single-threaded at that point (also, single-threaded in the > rfork(2) sense because of the vm_refcnt check)? I'm glad I'm not the only person scratching his head :-) I'm assuming that one needs to know something abuot the Sparc64 architecture for this to make sense... maybe one mmu for > 1 CPU or something? Virtual IO for devices?