From owner-svn-src-stable@FreeBSD.ORG Tue May 19 22:07:55 2009 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 81F0E1065686; Tue, 19 May 2009 22:07:55 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 6A8E68FC0A; Tue, 19 May 2009 22:07:55 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n4JM7twC011251; Tue, 19 May 2009 22:07:55 GMT (envelope-from jhb@svn.freebsd.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n4JM7spY011238; Tue, 19 May 2009 22:07:54 GMT (envelope-from jhb@svn.freebsd.org) Message-Id: <200905192207.n4JM7spY011238@svn.freebsd.org> From: John Baldwin Date: Tue, 19 May 2009 22:07:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r192409 - in stable/7: sys sys/amd64/amd64 sys/arm/arm sys/contrib/pf sys/dev/ath/ath_hal sys/dev/cxgb sys/i386/i386 sys/ia64/ia64 sys/kern sys/powerpc/powerpc sys/sparc64/sparc64 sys/s... X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 May 2009 22:07:56 -0000 Author: jhb Date: Tue May 19 22:07:54 2009 New Revision: 192409 URL: http://svn.freebsd.org/changeset/base/192409 Log: MFC: - Add the interrupt vector number to intr_event_create so MI code can lookup hard interrupt events by number. - Add support to cpuset for binding hardware interrupts. Modified: stable/7/sys/ (props changed) stable/7/sys/amd64/amd64/intr_machdep.c stable/7/sys/arm/arm/intr.c stable/7/sys/contrib/pf/ (props changed) stable/7/sys/dev/ath/ath_hal/ (props changed) stable/7/sys/dev/cxgb/ (props changed) stable/7/sys/i386/i386/intr_machdep.c stable/7/sys/ia64/ia64/interrupt.c stable/7/sys/kern/kern_cpuset.c stable/7/sys/kern/kern_intr.c stable/7/sys/powerpc/powerpc/intr_machdep.c stable/7/sys/sparc64/sparc64/intr_machdep.c stable/7/sys/sun4v/sun4v/intr_machdep.c stable/7/sys/sys/cpuset.h stable/7/sys/sys/interrupt.h stable/7/usr.bin/cpuset/ (props changed) stable/7/usr.bin/cpuset/cpuset.1 stable/7/usr.bin/cpuset/cpuset.c Modified: stable/7/sys/amd64/amd64/intr_machdep.c ============================================================================== --- stable/7/sys/amd64/amd64/intr_machdep.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/amd64/amd64/intr_machdep.c Tue May 19 22:07:54 2009 (r192409) @@ -139,7 +139,7 @@ intr_register_source(struct intsrc *isrc vector = isrc->is_pic->pic_vector(isrc); if (interrupt_sources[vector] != NULL) return (EEXIST); - error = intr_event_create(&isrc->is_event, isrc, 0, + error = intr_event_create(&isrc->is_event, isrc, 0, vector, intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source, (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:", vector); Modified: stable/7/sys/arm/arm/intr.c ============================================================================== --- stable/7/sys/arm/arm/intr.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/arm/arm/intr.c Tue May 19 22:07:54 2009 (r192409) @@ -70,7 +70,7 @@ arm_setup_irqhandler(const char *name, d return; event = intr_events[irq]; if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, + error = intr_event_create(&event, (void *)irq, 0, irq, (mask_fn)arm_mask_irq, (mask_fn)arm_unmask_irq, NULL, NULL, "intr%d:", irq); if (error) Modified: stable/7/sys/i386/i386/intr_machdep.c ============================================================================== --- stable/7/sys/i386/i386/intr_machdep.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/i386/i386/intr_machdep.c Tue May 19 22:07:54 2009 (r192409) @@ -130,7 +130,7 @@ intr_register_source(struct intsrc *isrc vector = isrc->is_pic->pic_vector(isrc); if (interrupt_sources[vector] != NULL) return (EEXIST); - error = intr_event_create(&isrc->is_event, isrc, 0, + error = intr_event_create(&isrc->is_event, isrc, 0, vector, intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source, (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:", vector); Modified: stable/7/sys/ia64/ia64/interrupt.c ============================================================================== --- stable/7/sys/ia64/ia64/interrupt.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/ia64/ia64/interrupt.c Tue May 19 22:07:54 2009 (r192409) @@ -340,7 +340,7 @@ ia64_setup_intr(const char *name, int ir return (ENOMEM); error = intr_event_create(&i->event, (void *)(uintptr_t)vector, - 0, ia64_intr_mask, ia64_intr_unmask, ia64_intr_eoi, + 0, irq, ia64_intr_mask, ia64_intr_unmask, ia64_intr_eoi, NULL, "irq%u:", irq); if (error) { free(i, M_DEVBUF); Modified: stable/7/sys/kern/kern_cpuset.c ============================================================================== --- stable/7/sys/kern/kern_cpuset.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/kern/kern_cpuset.c Tue May 19 22:07:54 2009 (r192409) @@ -469,6 +469,8 @@ cpuset_which(cpuwhich_t which, id_t id, } return (ESRCH); } + case CPU_WHICH_IRQ: + return (0); default: return (EINVAL); } @@ -875,6 +877,8 @@ cpuset_getid(struct thread *td, struct c case CPU_WHICH_CPUSET: case CPU_WHICH_JAIL: break; + case CPU_WHICH_IRQ: + return (EINVAL); } switch (uap->level) { case CPU_LEVEL_ROOT: @@ -936,6 +940,9 @@ cpuset_getaffinity(struct thread *td, st case CPU_WHICH_CPUSET: case CPU_WHICH_JAIL: break; + case CPU_WHICH_IRQ: + error = EINVAL; + goto out; } if (uap->level == CPU_LEVEL_ROOT) nset = cpuset_refroot(set); @@ -964,6 +971,9 @@ cpuset_getaffinity(struct thread *td, st case CPU_WHICH_JAIL: CPU_COPY(&set->cs_mask, mask); break; + case CPU_WHICH_IRQ: + error = intr_getaffinity(uap->id, mask); + break; } break; default: @@ -1041,6 +1051,9 @@ cpuset_setaffinity(struct thread *td, st case CPU_WHICH_CPUSET: case CPU_WHICH_JAIL: break; + case CPU_WHICH_IRQ: + error = EINVAL; + goto out; } if (uap->level == CPU_LEVEL_ROOT) nset = cpuset_refroot(set); @@ -1067,6 +1080,9 @@ cpuset_setaffinity(struct thread *td, st cpuset_rel(set); } break; + case CPU_WHICH_IRQ: + error = intr_setaffinity(uap->id, mask); + break; default: error = EINVAL; break; Modified: stable/7/sys/kern/kern_intr.c ============================================================================== --- stable/7/sys/kern/kern_intr.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/kern/kern_intr.c Tue May 19 22:07:54 2009 (r192409) @@ -32,6 +32,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -91,6 +92,8 @@ SYSCTL_INT(_hw, OID_AUTO, intr_storm_thr "Number of consecutive interrupts before storm protection is enabled"); static TAILQ_HEAD(, intr_event) event_list = TAILQ_HEAD_INITIALIZER(event_list); +static struct mtx event_lock; +MTX_SYSINIT(intr_event_list, &event_lock, "intr event list", MTX_DEF); static void intr_event_update(struct intr_event *ie); #ifdef INTR_FILTER @@ -244,7 +247,7 @@ intr_event_update(struct intr_event *ie) } int -intr_event_create(struct intr_event **event, void *source,int flags, +intr_event_create(struct intr_event **event, void *source, int flags, int irq, void (*pre_ithread)(void *), void (*post_ithread)(void *), void (*post_filter)(void *), int (*assign_cpu)(void *, u_char), const char *fmt, ...) @@ -262,6 +265,7 @@ intr_event_create(struct intr_event **ev ie->ie_post_filter = post_filter; ie->ie_assign_cpu = assign_cpu; ie->ie_flags = flags; + ie->ie_irq = irq; ie->ie_cpu = NOCPU; TAILQ_INIT(&ie->ie_handlers); mtx_init(&ie->ie_lock, "intr event", NULL, MTX_DEF); @@ -270,9 +274,9 @@ intr_event_create(struct intr_event **ev vsnprintf(ie->ie_name, sizeof(ie->ie_name), fmt, ap); va_end(ap); strlcpy(ie->ie_fullname, ie->ie_name, sizeof(ie->ie_fullname)); - mtx_pool_lock(mtxpool_sleep, &event_list); + mtx_lock(&event_lock); TAILQ_INSERT_TAIL(&event_list, ie, ie_list); - mtx_pool_unlock(mtxpool_sleep, &event_list); + mtx_unlock(&event_lock); if (event != NULL) *event = ie; CTR2(KTR_INTR, "%s: created %s", __func__, ie->ie_name); @@ -290,7 +294,8 @@ intr_event_create(struct intr_event **ev int intr_event_bind(struct intr_event *ie, u_char cpu) { - struct thread *td; + cpuset_t mask; + lwpid_t id; int error; /* Need a CPU to bind to. */ @@ -299,28 +304,95 @@ intr_event_bind(struct intr_event *ie, u if (ie->ie_assign_cpu == NULL) return (EOPNOTSUPP); - - /* Don't allow a bind request if the interrupt is already bound. */ + /* + * If we have any ithreads try to set their mask first since this + * can fail. + */ mtx_lock(&ie->ie_lock); - if (ie->ie_cpu != NOCPU && cpu != NOCPU) { + if (ie->ie_thread != NULL) { + CPU_ZERO(&mask); + if (cpu == NOCPU) + CPU_COPY(cpuset_root, &mask); + else + CPU_SET(cpu, &mask); + id = ie->ie_thread->it_thread->td_tid; + mtx_unlock(&ie->ie_lock); + error = cpuset_setthread(id, &mask); + if (error) + return (error); + } else mtx_unlock(&ie->ie_lock); - return (EBUSY); - } - mtx_unlock(&ie->ie_lock); - error = ie->ie_assign_cpu(ie->ie_source, cpu); if (error) return (error); mtx_lock(&ie->ie_lock); - if (ie->ie_thread != NULL) - td = ie->ie_thread->it_thread; - else - td = NULL; - if (td != NULL) - thread_lock(td); ie->ie_cpu = cpu; - if (td != NULL) - thread_unlock(td); + mtx_unlock(&ie->ie_lock); + + return (error); +} + +static struct intr_event * +intr_lookup(int irq) +{ + struct intr_event *ie; + + mtx_lock(&event_lock); + TAILQ_FOREACH(ie, &event_list, ie_list) + if (ie->ie_irq == irq && + (ie->ie_flags & IE_SOFT) == 0 && + TAILQ_FIRST(&ie->ie_handlers) != NULL) + break; + mtx_unlock(&event_lock); + return (ie); +} + +int +intr_setaffinity(int irq, void *m) +{ + struct intr_event *ie; + cpuset_t *mask; + u_char cpu; + int n; + + mask = m; + cpu = NOCPU; + /* + * If we're setting all cpus we can unbind. Otherwise make sure + * only one cpu is in the set. + */ + if (CPU_CMP(cpuset_root, mask)) { + for (n = 0; n < CPU_SETSIZE; n++) { + if (!CPU_ISSET(n, mask)) + continue; + if (cpu != NOCPU) + return (EINVAL); + cpu = (u_char)n; + } + } + ie = intr_lookup(irq); + if (ie == NULL) + return (ESRCH); + intr_event_bind(ie, cpu); + return (0); +} + +int +intr_getaffinity(int irq, void *m) +{ + struct intr_event *ie; + cpuset_t *mask; + + mask = m; + ie = intr_lookup(irq); + if (ie == NULL) + return (ESRCH); + CPU_ZERO(mask); + mtx_lock(&ie->ie_lock); + if (ie->ie_cpu == NOCPU) + CPU_COPY(cpuset_root, mask); + else + CPU_SET(ie->ie_cpu, mask); mtx_unlock(&ie->ie_lock); return (0); } @@ -329,14 +401,14 @@ int intr_event_destroy(struct intr_event *ie) { + mtx_lock(&event_lock); mtx_lock(&ie->ie_lock); if (!TAILQ_EMPTY(&ie->ie_handlers)) { mtx_unlock(&ie->ie_lock); + mtx_unlock(&event_lock); return (EBUSY); } - mtx_pool_lock(mtxpool_sleep, &event_list); TAILQ_REMOVE(&event_list, ie, ie_list); - mtx_pool_unlock(mtxpool_sleep, &event_list); #ifndef notyet if (ie->ie_thread != NULL) { ithread_destroy(ie->ie_thread); @@ -344,6 +416,7 @@ intr_event_destroy(struct intr_event *ie } #endif mtx_unlock(&ie->ie_lock); + mtx_unlock(&event_lock); mtx_destroy(&ie->ie_lock); free(ie, M_ITHREAD); return (0); @@ -916,7 +989,7 @@ swi_add(struct intr_event **eventp, cons if (!(ie->ie_flags & IE_SOFT)) return (EINVAL); } else { - error = intr_event_create(&ie, NULL, IE_SOFT, + error = intr_event_create(&ie, NULL, IE_SOFT, 0, NULL, NULL, NULL, NULL, "swi%d:", pri); if (error) return (error); @@ -1099,7 +1172,6 @@ ithread_loop(void *arg) struct intr_event *ie; struct thread *td; struct proc *p; - u_char cpu; td = curthread; p = td->td_proc; @@ -1108,7 +1180,6 @@ ithread_loop(void *arg) ("%s: ithread and proc linkage out of sync", __func__)); ie = ithd->it_event; ie->ie_count = 0; - cpu = NOCPU; /* * As long as we have interrupts outstanding, go through the @@ -1154,21 +1225,6 @@ ithread_loop(void *arg) ie->ie_count = 0; mi_switch(SW_VOL, NULL); } - -#ifdef SMP - /* - * Ensure we are bound to the correct CPU. We can't - * move ithreads until SMP is running however, so just - * leave interrupts on the boor CPU during boot. - */ - if (ie->ie_cpu != cpu && smp_started) { - cpu = ie->ie_cpu; - if (cpu == NOCPU) - sched_unbind(td); - else - sched_bind(td, cpu); - } -#endif thread_unlock(td); } } @@ -1269,7 +1325,6 @@ ithread_loop(void *arg) struct thread *td; struct proc *p; int priv; - u_char cpu; td = curthread; p = td->td_proc; @@ -1280,7 +1335,6 @@ ithread_loop(void *arg) ("%s: ithread and proc linkage out of sync", __func__)); ie = ithd->it_event; ie->ie_count = 0; - cpu = NOCPU; /* * As long as we have interrupts outstanding, go through the @@ -1329,21 +1383,6 @@ ithread_loop(void *arg) ie->ie_count = 0; mi_switch(SW_VOL, NULL); } - -#ifdef SMP - /* - * Ensure we are bound to the correct CPU. We can't - * move ithreads until SMP is running however, so just - * leave interrupts on the boor CPU during boot. - */ - if (!priv && ie->ie_cpu != cpu && smp_started) { - cpu = ie->ie_cpu; - if (cpu == NOCPU) - sched_unbind(td); - else - sched_bind(td, cpu); - } -#endif thread_unlock(td); } } @@ -1573,8 +1612,6 @@ db_dump_intr_event(struct intr_event *ie db_printf("(pid %d)", it->it_thread->td_proc->p_pid); else db_printf("(no thread)"); - if (ie->ie_cpu != NOCPU) - db_printf(" (CPU %d)", ie->ie_cpu); if ((ie->ie_flags & (IE_SOFT | IE_ENTROPY | IE_ADDING_THREAD)) != 0 || (it != NULL && it->it_need)) { db_printf(" {"); Modified: stable/7/sys/powerpc/powerpc/intr_machdep.c ============================================================================== --- stable/7/sys/powerpc/powerpc/intr_machdep.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/powerpc/powerpc/intr_machdep.c Tue May 19 22:07:54 2009 (r192409) @@ -184,7 +184,7 @@ powerpc_setup_intr(const char *name, u_i /* XXX unlock */ return (ENOMEM); } - error = intr_event_create(&i->event, (void *)irq, 0, + error = intr_event_create(&i->event, (void *)irq, 0, irq, powerpc_intr_mask, powerpc_intr_unmask, powerpc_intr_eoi, NULL, "irq%u:", irq); if (error) { Modified: stable/7/sys/sparc64/sparc64/intr_machdep.c ============================================================================== --- stable/7/sys/sparc64/sparc64/intr_machdep.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/sparc64/sparc64/intr_machdep.c Tue May 19 22:07:54 2009 (r192409) @@ -297,7 +297,7 @@ intr_controller_register(int vec, const sx_xunlock(&intr_table_lock); if (ie != NULL) return (EEXIST); - error = intr_event_create(&ie, iv, 0, NULL, ic->ic_clear, + error = intr_event_create(&ie, iv, 0, vec, NULL, ic->ic_clear, ic->ic_clear, intr_assign_cpu, "vec%d:", vec); if (error != 0) return (error); Modified: stable/7/sys/sun4v/sun4v/intr_machdep.c ============================================================================== --- stable/7/sys/sun4v/sun4v/intr_machdep.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/sun4v/sun4v/intr_machdep.c Tue May 19 22:07:54 2009 (r192409) @@ -307,8 +307,8 @@ inthand_add(const char *name, int vec, d ie = iv->iv_event; mtx_unlock_spin(&intr_table_lock); if (ie == NULL) { - errcode = intr_event_create(&ie, (void *)(intptr_t)vec, 0, NULL, - intr_enable, intr_enable, NULL, "vec%d:", vec); + errcode = intr_event_create(&ie, (void *)(intptr_t)vec, 0, vec, + NULL, intr_enable, intr_enable, NULL, "vec%d:", vec); if (errcode) return (errcode); mtx_lock_spin(&intr_table_lock); Modified: stable/7/sys/sys/cpuset.h ============================================================================== --- stable/7/sys/sys/cpuset.h Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/sys/cpuset.h Tue May 19 22:07:54 2009 (r192409) @@ -131,7 +131,7 @@ typedef struct _cpuset { #define CPU_WHICH_TID 1 /* Specifies a thread id. */ #define CPU_WHICH_PID 2 /* Specifies a process id. */ #define CPU_WHICH_CPUSET 3 /* Specifies a set id. */ -/* CPU_WHICH_IRQ */ +#define CPU_WHICH_IRQ 4 /* Specifies an irq #. */ #define CPU_WHICH_JAIL 5 /* Specifies a jail id. */ /* Modified: stable/7/sys/sys/interrupt.h ============================================================================== --- stable/7/sys/sys/interrupt.h Tue May 19 20:23:32 2009 (r192408) +++ stable/7/sys/sys/interrupt.h Tue May 19 22:07:54 2009 (r192409) @@ -107,6 +107,7 @@ struct intr_event { int ie_count; /* Loop counter. */ int ie_warncnt; /* Rate-check interrupt storm warns. */ struct timeval ie_warntm; + int ie_irq; /* Physical irq number if !SOFT. */ u_char ie_cpu; /* CPU this event is bound to. */ }; @@ -151,14 +152,16 @@ int intr_event_add_handler(struct intr_e u_char pri, enum intr_type flags, void **cookiep); int intr_event_bind(struct intr_event *ie, u_char cpu); int intr_event_create(struct intr_event **event, void *source, - int flags, void (*pre_ithread)(void *), + int flags, int irq, void (*pre_ithread)(void *), void (*post_ithread)(void *), void (*post_filter)(void *), int (*assign_cpu)(void *, u_char), const char *fmt, ...) - __printflike(8, 9); + __printflike(9, 10); int intr_event_destroy(struct intr_event *ie); int intr_event_handle(struct intr_event *ie, struct trapframe *frame); int intr_event_remove_handler(void *cookie); +int intr_getaffinity(int irq, void *mask); void *intr_handler_source(void *cookie); +int intr_setaffinity(int irq, void *mask); int swi_add(struct intr_event **eventp, const char *name, driver_intr_t handler, void *arg, int pri, enum intr_type flags, void **cookiep); Modified: stable/7/usr.bin/cpuset/cpuset.1 ============================================================================== --- stable/7/usr.bin/cpuset/cpuset.1 Tue May 19 20:23:32 2009 (r192408) +++ stable/7/usr.bin/cpuset/cpuset.1 Tue May 19 22:07:54 2009 (r192409) @@ -35,7 +35,7 @@ .Nm .Op Fl l Ar cpu-list .Op Fl s Ar setid -.Ar cmd +.Ar cmd ... .Nm .Op Fl l Ar cpu-list .Op Fl s Ar setid @@ -43,10 +43,10 @@ .Nm .Op Fl cr .Op Fl l Ar cpu-list -.Op Fl j Ar jailid | Fl p Ar pid | Fl r Ar tid | Fl s Ar setid | Fl x Ar irq +.Op Fl j Ar jailid | Fl p Ar pid | Fl t Ar tid | Fl s Ar setid | Fl x Ar irq .Nm .Op Fl cgir -.Op Fl j Ar jailid | Fl p Ar pid | Fl r Ar tid | Fl s Ar setid | Fl x Ar irq +.Op Fl j Ar jailid | Fl p Ar pid | Fl t Ar tid | Fl s Ar setid | Fl x Ar irq .Sh DESCRIPTION The .Nm @@ -104,7 +104,7 @@ target specifier. .It Fl g Causes .Nm -to print either a list of valid CPUs or, using +to print either a list of valid CPUs or, using .Fl i , the id of the target. .It Fl i @@ -116,17 +116,17 @@ Specifies a jail id as the target of the .It Fl l Ar cpu-list Specifies a list of CPUs to apply to a target. Specification may include -numbers seperated by '-' for ranges and commas separating individual numbers. +numbers separated by '-' for ranges and commas separating individual numbers. .It Fl p Ar pid Specifies a pid as the target of the operation. -.It Fl s Ar setid +.It Fl s Ar setid Specifies a set id as the target of the operation. .It Fl r The requested operation should reference the root set available via the target specifier. .It Fl t Ar tid Specifies a thread id as the target of the operation. -.It Fl x Ar irq +.It Fl x Ar irq Specifies an irq as the target of the operation. .El .Sh EXIT STATUS Modified: stable/7/usr.bin/cpuset/cpuset.c ============================================================================== --- stable/7/usr.bin/cpuset/cpuset.c Tue May 19 20:23:32 2009 (r192408) +++ stable/7/usr.bin/cpuset/cpuset.c Tue May 19 22:07:54 2009 (r192409) @@ -2,6 +2,9 @@ * Copyright (c) 2007, 2008 Jeffrey Roberson * All rights reserved. * + * Copyright (c) 2008 Nokia Corporation + * All rights reserved. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -52,6 +55,7 @@ int pflag; int rflag; int sflag; int tflag; +int xflag; id_t id; cpulevel_t level; cpuwhich_t which; @@ -150,7 +154,7 @@ printset(cpuset_t *mask) printf("\n"); } -const char *whichnames[] = { NULL, "tid", "pid", "cpuset", "N/A", "jail" }; +const char *whichnames[] = { NULL, "tid", "pid", "cpuset", "irq", "jail" }; const char *levelnames[] = { NULL, " root", " cpuset", "" }; static void @@ -195,7 +199,7 @@ main(int argc, char *argv[]) level = CPU_LEVEL_WHICH; which = CPU_WHICH_PID; id = pid = tid = setid = -1; - while ((ch = getopt(argc, argv, "cgij:l:p:rs:t:")) != -1) { + while ((ch = getopt(argc, argv, "cgij:l:p:rs:t:x:")) != -1) { switch (ch) { case 'c': if (rflag) @@ -239,6 +243,11 @@ main(int argc, char *argv[]) which = CPU_WHICH_TID; id = tid = atoi(optarg); break; + case 'x': + xflag = 1; + which = CPU_WHICH_IRQ; + id = atoi(optarg); + break; default: usage(); } @@ -249,7 +258,7 @@ main(int argc, char *argv[]) if (argc || lflag) usage(); /* Only one identity specifier. */ - if (jflag + sflag + pflag + tflag > 1) + if (jflag + xflag + sflag + pflag + tflag > 1) usage(); if (iflag) printsetid(); @@ -263,7 +272,7 @@ main(int argc, char *argv[]) * The user wants to run a command with a set and possibly cpumask. */ if (argc) { - if (pflag | rflag | tflag | jflag) + if (pflag | rflag | tflag | xflag | jflag) usage(); if (sflag) { if (cpuset_setid(CPU_WHICH_PID, -1, setid)) @@ -289,7 +298,10 @@ main(int argc, char *argv[]) if (!lflag && !sflag) usage(); /* You can only set a mask on a thread. */ - if (tflag && (sflag | pflag | jflag)) + if (tflag && (sflag | pflag | xflag | jflag)) + usage(); + /* You can only set a mask on an irq. */ + if (xflag && (jflag | pflag | sflag | tflag)) usage(); if (pflag && sflag) { if (cpuset_setid(CPU_WHICH_PID, pid, setid)) @@ -319,8 +331,8 @@ usage(void) fprintf(stderr, " cpuset [-l cpu-list] [-s setid] -p pid\n"); fprintf(stderr, - " cpuset [-cr] [-l cpu-list] [-j jailid | -p pid | -t tid | -s setid]\n"); + " cpuset [-cr] [-l cpu-list] [-j jailid | -p pid | -t tid | -s setid | -x irq]\n"); fprintf(stderr, - " cpuset [-cgir] [-j jailid | -p pid | -t tid | -s setid]\n"); + " cpuset [-cgir] [-j jailid | -p pid | -t tid | -s setid | -x irq]\n"); exit(1); }