Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 12 Jul 2008 14:05:47 GMT
From:      Oleksandr Tymoshenko <gonzo@FreeBSD.org>
To:        Perforce Change Reviews <perforce@FreeBSD.org>
Subject:   PERFORCE change 145096 for review
Message-ID:  <200807121405.m6CE5lb1083871@repoman.freebsd.org>

next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=145096

Change 145096 by gonzo@gonzo_jeeves on 2008/07/12 14:04:54

	Remove mips32 path from the rest of files

Affected files ...

.. //depot/projects/mips2/src/sys/mips/adm5120/admpci.c#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/if_admsw.c#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/if_admswvar.h#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/obio.c#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/std.adm5120#4 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/uart_bus_adm5120.c#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/uart_cpu_adm5120.c#2 edit
.. //depot/projects/mips2/src/sys/mips/adm5120/uart_dev_adm5120.c#2 edit
.. //depot/projects/mips2/src/sys/mips/conf/ADM5120#6 edit
.. //depot/projects/mips2/src/sys/mips/conf/IDT#8 edit
.. //depot/projects/mips2/src/sys/mips/conf/SENTRY5#11 edit
.. //depot/projects/mips2/src/sys/mips/idt/idtpci.c#2 edit
.. //depot/projects/mips2/src/sys/mips/idt/if_kr.c#2 edit
.. //depot/projects/mips2/src/sys/mips/idt/obio.c#2 edit
.. //depot/projects/mips2/src/sys/mips/idt/std.idt#2 edit
.. //depot/projects/mips2/src/sys/mips/idt/uart_bus_rc32434.c#2 edit
.. //depot/projects/mips2/src/sys/mips/sentry5/obio.c#2 edit
.. //depot/projects/mips2/src/sys/mips/sentry5/s5_machdep.c#2 edit
.. //depot/projects/mips2/src/sys/mips/sentry5/uart_bus_sbusart.c#2 edit
.. //depot/projects/mips2/src/sys/mips/sentry5/uart_cpu_sbusart.c#2 edit

Differences ...

==== //depot/projects/mips2/src/sys/mips/adm5120/admpci.c#2 (text+ko) ====

@@ -87,7 +87,7 @@
 #include <dev/pci/pcib_private.h>
 #include "pcib_if.h"
 
-#include <mips/mips32/adm5120/adm5120reg.h>
+#include <mips/adm5120/adm5120reg.h>
 
 #ifdef ADMPCI_DEBUG
 int admpci_debug = 1;

==== //depot/projects/mips2/src/sys/mips/adm5120/if_admsw.c#2 (text+ko) ====

@@ -109,9 +109,9 @@
 #include <net/bpf.h>
 #include <net/bpfdesc.h>
 
-#include <mips/mips32/adm5120/adm5120reg.h>
-#include <mips/mips32/adm5120/if_admswreg.h>
-#include <mips/mips32/adm5120/if_admswvar.h>
+#include <mips/adm5120/adm5120reg.h>
+#include <mips/adm5120/if_admswreg.h>
+#include <mips/adm5120/if_admswvar.h>
 
 /* TODO: add locking */
 #define ADMSW_LOCK(sc) do {} while(0);

==== //depot/projects/mips2/src/sys/mips/adm5120/if_admswvar.h#2 (text+ko) ====

@@ -70,8 +70,8 @@
 #include <dev/mii/mii.h>
 #include <dev/mii/miivar.h>
 
-#include <mips/mips32/adm5120/adm5120reg.h>
-#include <mips/mips32/adm5120/if_admswreg.h>
+#include <mips/adm5120/adm5120reg.h>
+#include <mips/adm5120/if_admswreg.h>
 
 #define	MAC_BUFLEN	0x07ff
 

==== //depot/projects/mips2/src/sys/mips/adm5120/obio.c#2 (text+ko) ====

@@ -49,8 +49,8 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/adm5120/adm5120reg.h>
-#include <mips/mips32/adm5120/obiovar.h>
+#include <mips/adm5120/adm5120reg.h>
+#include <mips/adm5120/obiovar.h>
 
 /* MIPS HW interrupts of IRQ/FIQ respectively */
 #define ADM5120_INTR		0

==== //depot/projects/mips2/src/sys/mips/adm5120/std.adm5120#4 (text+ko) ====

@@ -2,7 +2,7 @@
 # Standard include file for ADM5120
 
 cpu		CPU_MIPS4KC
-files		"../mips32/adm5120/files.adm5120"
+files		"../adm5120/files.adm5120"
 options		ISA_MIPS32
 
 # device		admpci

==== //depot/projects/mips2/src/sys/mips/adm5120/uart_bus_adm5120.c#2 (text+ko) ====

@@ -53,7 +53,7 @@
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_cpu.h>
 
-#include <mips/mips32/adm5120/adm5120reg.h>
+#include <mips/adm5120/adm5120reg.h>
 
 #include "uart_if.h"
 

==== //depot/projects/mips2/src/sys/mips/adm5120/uart_cpu_adm5120.c#2 (text+ko) ====

@@ -48,7 +48,7 @@
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
 
-#include <mips/mips32/adm5120/adm5120reg.h>
+#include <mips/adm5120/adm5120reg.h>
 
 extern struct uart_class uart_adm5120_uart_class;
 bus_space_tag_t uart_bus_space_io;

==== //depot/projects/mips2/src/sys/mips/adm5120/uart_dev_adm5120.c#2 (text+ko) ====

@@ -45,7 +45,7 @@
 #include <dev/uart/uart_cpu.h>
 #include <dev/uart/uart_bus.h>
 
-#include <mips/mips32/adm5120/uart_dev_adm5120.h>
+#include <mips/adm5120/uart_dev_adm5120.h>
 
 #include "uart_if.h"
 

==== //depot/projects/mips2/src/sys/mips/conf/ADM5120#6 (text+ko) ====

@@ -27,7 +27,7 @@
 makeoptions	MODULES_OVERRIDE=""
 
 options		KERNVIRTADDR=0x80100000
-include		"../mips32/adm5120/std.adm5120"
+include		"../adm5120/std.adm5120"
 
 hints		"ADM5120.hints"		#Default places to look for devices.
 

==== //depot/projects/mips2/src/sys/mips/conf/IDT#8 (text+ko) ====

@@ -7,7 +7,7 @@
 # Don't build any modules yet.
 makeoptions	MODULES_OVERRIDE=""
 
-include		"../mips32/idt/std.idt"
+include		"../idt/std.idt"
 hints		"IDT.hints"		#Default places to look for devices.
 
 makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols

==== //depot/projects/mips2/src/sys/mips/conf/SENTRY5#11 (text+ko) ====

@@ -34,7 +34,7 @@
 
 # XXX only siba should be hardwired for now; we will use
 # bus enumeration there
-files		"../mips32/sentry5/files.sentry5"
+files		"../sentry5/files.sentry5"
 hints		"SENTRY5.hints"
 
 # sentry5 normally ships with cfe firmware; use the console for now

==== //depot/projects/mips2/src/sys/mips/idt/idtpci.c#2 (text+ko) ====

@@ -88,7 +88,7 @@
 #include <dev/pci/pcib_private.h>
 #include "pcib_if.h"
 
-#include <mips/mips32/idt/idtreg.h>
+#include <mips/idt/idtreg.h>
 
 #ifdef IDTPCI_DEBUG
 int idtpci_debug = 1;

==== //depot/projects/mips2/src/sys/mips/idt/if_kr.c#2 (text+ko) ====

@@ -69,7 +69,7 @@
 
 #include "miibus_if.h"
 
-#include <mips/mips32/idt/if_krreg.h>
+#include <mips/idt/if_krreg.h>
 
 #define KR_DEBUG
 

==== //depot/projects/mips2/src/sys/mips/idt/obio.c#2 (text+ko) ====

@@ -44,8 +44,8 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/idt/idtreg.h>
-#include <mips/mips32/idt/obiovar.h>
+#include <mips/idt/idtreg.h>
+#include <mips/idt/obiovar.h>
 
 #define ICU_REG_READ(o) \
     *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_ICU + (o)))

==== //depot/projects/mips2/src/sys/mips/idt/std.idt#2 (text+ko) ====

@@ -1,5 +1,5 @@
 # $FreeBSD: src/sys/mips/idt/std.idt,v 1.1 2008/07/06 21:09:29 imp Exp $
 # Standard include file for IDT
 
-files           "../mips32/idt/files.idt"
+files           "../idt/files.idt"
 options		ISA_MIPS32

==== //depot/projects/mips2/src/sys/mips/idt/uart_bus_rc32434.c#2 (text+ko) ====

@@ -46,7 +46,7 @@
 #include <machine/bus.h>
 #include <sys/rman.h>
 #include <machine/resource.h>
-#include <mips/mips32/idt/idtreg.h>
+#include <mips/idt/idtreg.h>
 
 #include <dev/pci/pcivar.h>
 

==== //depot/projects/mips2/src/sys/mips/sentry5/obio.c#2 (text+ko) ====

@@ -55,8 +55,8 @@
 
 #include <machine/bus.h>
 
-#include <mips/mips32/sentry5/obiovar.h>
-#include <mips/mips32/sentry5/sentry5reg.h>
+#include <mips/sentry5/obiovar.h>
+#include <mips/sentry5/sentry5reg.h>
 
 int	obio_probe(device_t);
 int	obio_attach(device_t);

==== //depot/projects/mips2/src/sys/mips/sentry5/s5_machdep.c#2 (text+ko) ====

@@ -30,7 +30,7 @@
 #include <sys/param.h>
 #include <machine/cpuregs.h>
 
-#include <mips/mips32/sentry5/s5reg.h>
+#include <mips/sentry5/s5reg.h>
 
 #include "opt_ddb.h"
 

==== //depot/projects/mips2/src/sys/mips/sentry5/uart_bus_sbusart.c#2 (text+ko) ====

@@ -53,7 +53,7 @@
 #include <dev/uart/uart_bus.h>
 #include <dev/uart/uart_cpu.h>
 
-#include <mips/mips32/sentry5/sentry5reg.h>
+#include <mips/sentry5/sentry5reg.h>
 
 #include "uart_if.h"
 

==== //depot/projects/mips2/src/sys/mips/sentry5/uart_cpu_sbusart.c#2 (text+ko) ====

@@ -48,7 +48,7 @@
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
 
-#include <mips/mips32/sentry5/sentry5reg.h>
+#include <mips/sentry5/sentry5reg.h>
 
 bus_space_tag_t uart_bus_space_io;
 bus_space_tag_t uart_bus_space_mem;



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200807121405.m6CE5lb1083871>