Date: Thu, 31 Jan 2008 15:45:35 GMT From: "Randall R. Stewart" <rrs@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 134551 for review Message-ID: <200801311545.m0VFjZqT048098@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=134551 Change 134551 by rrs@rrs-mips2-jnpr on 2008/01/31 15:44:56 one more change for the octeon cpu.c .. needs 128 byte cache lines Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu.c#8 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/cpu.c#8 (text+ko) ==== @@ -105,6 +105,15 @@ cpuinfo->l1.dc_linesize = tmp; cpuinfo->l1.dc_nways = (((cfg1 & MIPS_CONFIG1_DA_MASK) >> MIPS_CONFIG1_DA_SHIFT)) + 1; cpuinfo->l1.dc_nsets = 1 << (((cfg1 & MIPS_CONFIG1_DS_MASK) >> MIPS_CONFIG1_DS_SHIFT) + 6); +#ifdef TARGET_OCTEON + /* + * Octeon does 128 byte line-size. But Config-Sel1 doesn't show + * 128 line-size, 1 Set, 64 ways. + */ + cpuinfo->l1.dc_linesize = 128; + cpuinfo->l1.dc_nsets = 1; + cpuinfo->l1.dc_nways = 64; +#endif cpuinfo->l1.dc_size = cpuinfo->l1.dc_linesize * cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_nways; }
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