From owner-svn-src-head@freebsd.org Mon Jul 3 18:02:00 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 3847F9EC3DB; Mon, 3 Jul 2017 18:02:00 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 01CCF7A0A7; Mon, 3 Jul 2017 18:01:59 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v63I1xk6029079; Mon, 3 Jul 2017 18:01:59 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v63I1xCf029077; Mon, 3 Jul 2017 18:01:59 GMT (envelope-from manu@FreeBSD.org) Message-Id: <201707031801.v63I1xCf029077@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Mon, 3 Jul 2017 18:01:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r320606 - head/sys/arm/arm X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm/arm X-SVN-Commit-Revision: 320606 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jul 2017 18:02:00 -0000 Author: manu Date: Mon Jul 3 18:01:58 2017 New Revision: 320606 URL: https://svnweb.freebsd.org/changeset/base/320606 Log: arm: gic: Change GIC_DEBUG_SPURIOUS to TUNABLE On armv6 default to 1 if INVARIANTS is set On arm64 always default to 0 Discussed with: andrew, ian, mmel Modified: head/sys/arm/arm/gic.c head/sys/arm/arm/gic.h Modified: head/sys/arm/arm/gic.c ============================================================================== --- head/sys/arm/arm/gic.c Mon Jul 3 16:40:05 2017 (r320605) +++ head/sys/arm/arm/gic.c Mon Jul 3 18:01:58 2017 (r320606) @@ -145,6 +145,14 @@ static struct resource_spec arm_gic_spec[] = { { -1, 0 } }; + +#if defined(__arm__) && defined(INVARIANTS) +static int gic_debug_spurious = 1; +#else +static int gic_debug_spurious = 0; +#endif +TUNABLE_INT("hw.gic.debug_spurious", &gic_debug_spurious); + static u_int arm_gic_map[MAXCPU]; static struct arm_gic_softc *gic_sc = NULL; @@ -671,11 +679,10 @@ arm_gic_intr(void *arg) */ if (irq >= sc->nirqs) { -#ifdef GIC_DEBUG_SPURIOUS - device_printf(sc->gic_dev, - "Spurious interrupt detected: last irq: %d on CPU%d\n", - sc->last_irq[PCPU_GET(cpuid)], PCPU_GET(cpuid)); -#endif + if (gic_debug_spurious) + device_printf(sc->gic_dev, + "Spurious interrupt detected: last irq: %d on CPU%d\n", + sc->last_irq[PCPU_GET(cpuid)], PCPU_GET(cpuid)); return (FILTER_HANDLED); } @@ -700,9 +707,8 @@ dispatch_irq: #endif } -#ifdef GIC_DEBUG_SPURIOUS - sc->last_irq[PCPU_GET(cpuid)] = irq; -#endif + if (gic_debug_spurious) + sc->last_irq[PCPU_GET(cpuid)] = irq; if ((gi->gi_flags & GI_FLAG_EARLY_EOI) == GI_FLAG_EARLY_EOI) gic_c_write_4(sc, GICC_EOIR, irq_active_reg); Modified: head/sys/arm/arm/gic.h ============================================================================== --- head/sys/arm/arm/gic.h Mon Jul 3 16:40:05 2017 (r320605) +++ head/sys/arm/arm/gic.h Mon Jul 3 18:01:58 2017 (r320606) @@ -39,8 +39,6 @@ #ifndef _ARM_GIC_H_ #define _ARM_GIC_H_ -#define GIC_DEBUG_SPURIOUS - #define GIC_FIRST_SGI 0 /* Irqs 0-15 are SGIs/IPIs. */ #define GIC_LAST_SGI 15 #define GIC_FIRST_PPI 16 /* Irqs 16-31 are private (per */ @@ -70,9 +68,7 @@ struct arm_gic_softc { struct mtx mutex; uint32_t nirqs; uint32_t typer; -#ifdef GIC_DEBUG_SPURIOUS uint32_t last_irq[MAXCPU]; -#endif #ifdef INTRNG uint32_t gic_iidr;