Date: Thu, 11 Nov 2004 05:53:12 +1100 From: Peter Jeremy <PeterJeremy@optushome.com.au> To: Alfred Perlstein <alfred@freebsd.org> Cc: Stephan Uphoff <ups@tree.com> Subject: Re: cvs commit: src/sys/i386/i386 pmap.c Message-ID: <20041110185312.GO79646@cirb503493.alcatel.com.au> In-Reply-To: <20041109201954.GO24892@elvis.mu.org> References: <Pine.NEB.3.96L.1041109103037.73102S-100000@fledge.watson.org> <4191062A.6090009@elischer.org> <1100024464.29384.30.camel@palm.tree.com> <41910D86.3080605@freebsd.org> <1100025632.29384.54.camel@palm.tree.com> <20041109201954.GO24892@elvis.mu.org>
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On Tue, 2004-Nov-09 12:19:54 -0800, Alfred Perlstein wrote: >* Stephan Uphoff <ups@tree.com> [041109 10:43] wrote: >> >> Caugh, caugh ... yes that would be a fine name .... caugh, caugh > >Don't feel too bad, the original spl mechanism would talk to the >hardware, what you mentioned was an optimization that spl didn't >get until later. The SPL mechanism was an excellent fit for the PDP-11 (and M68K) which managed interrupt priorities within the CPU. On the PC, it was far more expensive because interrupt prioritisation was managed in the i8259's and required several io instructions to update. Moving to a software SPL was effectively just moving back to the PDP-11 approach (managing priorities within the CPU) though with the prioritisation explicitly coded rather than in the microcode. -- Peter Jeremy
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