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Date:      Mon, 28 Oct 2019 06:41:57 -0700
From:      Cy Schubert <Cy.Schubert@cschubert.com>
To:        freebsd-hackers@freebsd.org, Craig Leres <leres@freebsd.org>, FreeBSD Hackers <freebsd-hackers@freebsd.org>
Subject:   Re: How to prevent underclocking when running with 1 redundant power supply
Message-ID:  <F1A190F2-21CE-4DBF-8674-3C5DD283F483@cschubert.com>
In-Reply-To: <c5c17e85-805f-30b3-306a-a4651b61c071@freebsd.org>
References:  <c5c17e85-805f-30b3-306a-a4651b61c071@freebsd.org>

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On October 27, 2019 2:07:12 PM PDT, Craig Leres <leres@freebsd=2Eorg> wrote=
:
>I have a nameserver running 11=2E3-RELEASE-p4=2E It has a Supermicro
>X9SRi-F=20
>motherboard in a 1U chassis with redundant PWS-406P-1R power supplies=20
>(400W each)=2E
>
>Site power is out thanks to a PG&E "public safety power shutdown" and I
>
>find that the system is really unhappy=2E It looks like it is=20
>underclocking due to one power supply not being powered:
>
>     # sysctl dev=2Ecpu=2E0=2Efreq_levels dev=2Ecpu=2E0=2Efreq
>    dev=2Ecpu=2E0=2Efreq_levels: 3001/80000 3000/80000 2900/75926 2700/69=
558=20
>2600/65698 2500/62669 2400/59709 2200/53206 2100/50412 2000/46962=20
>1800/41676 1700/38423 1600/35918 1500/33467 1300/28074 1200/25787
>     dev=2Ecpu=2E0=2Efreq: 1200
>
>I found powerd and tried this:
>
>     powerd_enable=3D"YES"
>     powerd_flags=3D"-a max -b max -n max"
>
>which works=2E=2E=2E once it's started=2E Now I'm finding one system has =
a=20
>difficult time booting because powerd is started so late in the boot=20
>process=2E
>
>Is there a sysctl I can put in loader=2Econf to disable this
>underclocking=20
>behavior?
>
>Thanks!
>
>		Craig
>_______________________________________________
>freebsd-hackers@freebsd=2Eorg mailing list
>https://lists=2Efreebsd=2Eorg/mailman/listinfo/freebsd-hackers
>To unsubscribe, send any mail to
>"freebsd-hackers-unsubscribe@freebsd=2Eorg"

dev=2Ecpu=2E0=2Efreq can be set by hand (or script)=2E

I suppose your BIOS automatically reduces the clock rate with one power su=
pply connected=2E I assume that's a safety feature one might want to invest=
igate before incurring possible undesired consequences=2E=20


--=20
Pardon the typos and autocorrect, small keyboard in use=2E=20
Cy Schubert <Cy=2ESchubert@cschubert=2Ecom>
FreeBSD UNIX: <cy@FreeBSD=2Eorg> Web: https://www=2EFreeBSD=2Eorg

The need of the many outweighs the greed of the few=2E

Sent from my Android device with K-9 Mail=2E Please excuse my brevity=2E
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Date: Mon, 28 Oct 2019 12:10:05 -0700
From: Oleksandr Tymoshenko <gonzo@bluezbox.com>
To: Milan Obuch <freebsd-hackers@dino.sk>
Cc: Oliver Pinter <oliver.pinter@hardenedbsd.org>, freebsd-hackers@freebsd.org
Subject: Re: UART driver as kld - how?
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 Content preview:  Milan Obuch (freebsd-hackers@dino.sk) wrote: > On Sun, 27
 Oct 2019 22:52:10 +0100 > Oliver Pinter <oliver.pinter@hardenedbsd.org> wrote:
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Milan Obuch (freebsd-hackers@dino.sk) wrote:
> On Sun, 27 Oct 2019 22:52:10 +0100
> Oliver Pinter <oliver.pinter@hardenedbsd.org> wrote:
> 
> > On Sunday, October 27, 2019, Milan Obuch <freebsd-hackers@dino.sk>
> > wrote:
> > 
> > > Hi,
> > >
> > > I am trying to create a driver for Xilinx' AXI UART Lite IP core. I
> > > can't find a way to do it as kld module. I started with
> > > uart_dev_cdnc.c, but I can't see how it is hooked into the kernel -
> > > or, better formulated, how can I created kld loadable module. As
> > > Zynq has uart_dev_cdnc driver for its PS UART, all necessary files
> > > are compiled into kernel, but how can I extend those modules tables
> > > to work with new driver too?
> > >
> > > You can ask why I want it this way, if I can put this into kernel...
> > > simply this would make development awkward - every change would mean
> > > recompile everything (or at least relinking kernel) and reboot. With
> > > kld, I can just rebuild the module, reinstall it, unload old/load
> > > new version and test. Other thing is, for any IP core I must first
> > > load hw design into PL part (FPGA bitstream, actually), there is
> > > simply no device without this step performed.
> > >
> > > Did anybody already create something similar? Any help/hint/pointer
> > > appreciated...  
> > 
> > 
> > https://github.com/freebsd/freebsd/tree/master/share/examples/kld
> > 
> 
> Hi,
> 
> my problem is somewhere else - I am able to build kld, load and unload
> it, but in all uart_dev_xxxx.c files I saw there are no attach and
> detach function, so there must be something more to do. On the other
> side, uart_core.o is already present in kernel, but how should I make
> it work with newly loaded module? uart_bus_fdt.o is linked in kernel
> too, and there are attach and detach function, but how can my tables be
> added in list for it?

>From what I see in source code, UART drivers with FDT support are
tied to the UART subsystem using  UART_FDT_CLASS_AND_DEVICE macro,
that adds compat data (list of compatible strings for the driver
with pointer to respective uart_class instance) to uart_fdt_class_and_device_set
dataset. This dataset is then traversed by uart_fdt_find_device in
uart_fdt_probe function.

You need:

- Add FDT node to device tree, with unique compatible property value
  and "status" property set to "okay"
- In you driver do something like:

static struct ofw_compat_data compat_data[] = {
        {"xlnx,axilite",        (uintptr_t)&uart_axilite_class},
        {NULL,                  (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);

xlnx,axilite in this case is just something I've just made up, you need
to get the value from the vendor's DTS bindings documentation.

-- 
gonzo



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