Date: Mon, 29 Sep 2003 18:36:33 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 38826 for review Message-ID: <200309300136.h8U1aXux027490@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=38826 Change 38826 by peter@peter_hammer on 2003/09/29 18:36:22 make this compile. jhb still has the unused 'icu' arg to FAST_INTR(), I didn't add it back. Affected files ... .. //depot/projects/hammer/sys/amd64/isa/atpic_vector.s#4 edit Differences ... ==== //depot/projects/hammer/sys/amd64/isa/atpic_vector.s#4 (text+ko) ==== @@ -46,65 +46,39 @@ #include "assym.s" -#define FAST_INTR_HANDLER_USES_ES 1 -#ifdef FAST_INTR_HANDLER_USES_ES -#define ACTUALLY_PUSHED 1 -#define MAYBE_MOVW_AX_ES movw %ax,%es -#define MAYBE_POPL_ES popl %es -#define MAYBE_PUSHL_ES pushl %es -#else -/* - * We can usually skip loading %es for fastintr handlers. %es should - * only be used for string instructions, and fastintr handlers shouldn't - * do anything slow enough to justify using a string instruction. - */ -#define ACTUALLY_PUSHED 0 -#define MAYBE_MOVW_AX_ES -#define MAYBE_POPL_ES -#define MAYBE_PUSHL_ES -#endif - #define IRQ_BIT(irq_num) (1 << ((irq_num) % 8)) #define IRQ_BYTE(irq_num) ((irq_num) >> 3) -#ifdef AUTO_EOI_1 - -#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */ -#define OUTB_ICU1 - -#else - #define ENABLE_ICU1 \ movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \ - OUTB_ICU1 /* ... to clear in service bit */ - -#define OUTB_ICU1 \ - outb %al,$IO_ICU1 - -#endif - -#ifdef AUTO_EOI_2 -/* - * The data sheet says no auto-EOI on slave, but it sometimes works. - */ -#define ENABLE_ICU1_AND_2 ENABLE_ICU1 + outb %al,$IO_ICU1 /* ... to clear in service bit */ -#else - #define ENABLE_ICU1_AND_2 \ movb $ICU_EOI,%al ; /* as above */ \ outb %al,$IO_ICU2 ; /* but do second icu first ... */ \ - OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */ + outb %al,$IO_ICU1 /* ... then first icu (if !AUTO_EOI_1) */ -#endif #define PUSH_FRAME \ - pushl $0 ; /* dummy error code */ \ - pushl $0 ; /* dummy trap type */ \ - pushal ; /* 8 ints */ \ - pushl %ds ; /* save data and extra segments ... */ \ - pushl %es ; \ - pushl %fs + subq $TF_RIP,%rsp ; /* skip dummy tf_err and tf_trapno */ \ + testb $SEL_RPL_MASK,TF_CS(%rsp) ; /* come from kernel? */ \ + jz 1f ; /* Yes, dont swapgs again */ \ + swapgs ; \ +1: movq %rdi,TF_RDI(%rsp) ; \ + movq %rsi,TF_RSI(%rsp) ; \ + movq %rdx,TF_RDX(%rsp) ; \ + movq %rcx,TF_RCX(%rsp) ; \ + movq %r8,TF_R8(%rsp) ; \ + movq %r9,TF_R9(%rsp) ; \ + movq %rax,TF_RAX(%rsp) ; \ + movq %rbx,TF_RBX(%rsp) ; \ + movq %rbp,TF_RBP(%rsp) ; \ + movq %r10,TF_R10(%rsp) ; \ + movq %r11,TF_R11(%rsp) ; \ + movq %r12,TF_R12(%rsp) ; \ + movq %r13,TF_R13(%rsp) ; \ + movq %r14,TF_R14(%rsp) ; \ + movq %r15,TF_R15(%rsp) ; \ #define MASK_IRQ(icu, irq_num) \ movb imen + IRQ_BYTE(irq_num),%al ; \ @@ -116,28 +90,23 @@ * Macros for interrupt interrupt entry, call to handler, and exit. */ -#define FAST_INTR(irq_num, vec_name, icu, enable_icus) \ +#define FAST_INTR(irq_num, vec_name, enable_icus) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ - mov $KDSEL,%ax ; \ - mov %ax,%ds ; \ - mov %ax,%es ; \ - mov $KPSEL,%ax ; \ - mov %ax,%fs ; \ - FAKE_MCOUNT((12+ACTUALLY_PUSHED)*4(%esp)) ; \ + FAKE_MCOUNT((12)*4(%esp)) ; \ call critical_enter ; \ - movl PCPU(CURTHREAD),%ebx ; \ - incl TD_INTR_NESTING_LEVEL(%ebx) ; \ - pushl atpic_intr_arg + (irq_num) * 4 ; \ - call *atpic_intr_handler + (irq_num) * 4 ; \ - addl $4,%esp ; \ + movq PCPU(CURTHREAD),%rbx ; \ + incl TD_INTR_NESTING_LEVEL(%rbx) ; \ + pushq atpic_intr_arg + (irq_num) * 8 ; \ + call *atpic_intr_handler + (irq_num) * 8 ; \ + addq $8,%rsp ; \ enable_icus ; \ incl cnt+V_INTR ; /* book-keeping can wait */ \ - movl atpic_intr_countp + (irq_num) * 4,%eax ; \ - incl (%eax) ; \ - decl TD_INTR_NESTING_LEVEL(%ebx) ; \ + movq atpic_intr_countp + (irq_num) * 8,%rax ; \ + incq (%rax) ; \ + decl TD_INTR_NESTING_LEVEL(%rbx) ; \ call critical_exit ; \ MEXITCOUNT ; \ jmp doreti @@ -156,46 +125,37 @@ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ - mov $KDSEL,%ax ; /* load kernel ds, es and fs */ \ - mov %ax,%ds ; \ - mov %ax,%es ; \ - mov $KPSEL,%ax ; \ - mov %ax,%fs ; \ -; \ maybe_extra_ipending ; \ MASK_IRQ(icu, irq_num) ; \ enable_icus ; \ -; \ - movl PCPU(CURTHREAD),%ebx ; \ - incl TD_INTR_NESTING_LEVEL(%ebx) ; \ -; \ + movq PCPU(CURTHREAD),%rbx ; \ + incl TD_INTR_NESTING_LEVEL(%rbx) ; \ FAKE_MCOUNT(13*4(%esp)) ; /* XXX late to avoid double count */ \ - pushl $irq_num; /* pass the IRQ */ \ + pushq $irq_num; /* pass the IRQ */ \ call atpic_sched_ithd ; \ - addl $4, %esp ; /* discard the parameter */ \ -; \ - decl TD_INTR_NESTING_LEVEL(%ebx) ; \ + addq $8, %rsp ; /* discard the parameter */ \ + decl TD_INTR_NESTING_LEVEL(%rbx) ; \ MEXITCOUNT ; \ jmp doreti MCOUNT_LABEL(bintr) /* XXX: no longer used */ - FAST_INTR(0,atpic_fastintr0, IO_ICU1, ENABLE_ICU1) - FAST_INTR(1,atpic_fastintr1, IO_ICU1, ENABLE_ICU1) - FAST_INTR(2,atpic_fastintr2, IO_ICU1, ENABLE_ICU1) - FAST_INTR(3,atpic_fastintr3, IO_ICU1, ENABLE_ICU1) - FAST_INTR(4,atpic_fastintr4, IO_ICU1, ENABLE_ICU1) - FAST_INTR(5,atpic_fastintr5, IO_ICU1, ENABLE_ICU1) - FAST_INTR(6,atpic_fastintr6, IO_ICU1, ENABLE_ICU1) - FAST_INTR(7,atpic_fastintr7, IO_ICU1, ENABLE_ICU1) - FAST_INTR(8,atpic_fastintr8, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(9,atpic_fastintr9, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(10,atpic_fastintr10, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(11,atpic_fastintr11, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(12,atpic_fastintr12, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(13,atpic_fastintr13, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(14,atpic_fastintr14, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(15,atpic_fastintr15, IO_ICU2, ENABLE_ICU1_AND_2) + FAST_INTR(0,atpic_fastintr0, ENABLE_ICU1) + FAST_INTR(1,atpic_fastintr1, ENABLE_ICU1) + FAST_INTR(2,atpic_fastintr2, ENABLE_ICU1) + FAST_INTR(3,atpic_fastintr3, ENABLE_ICU1) + FAST_INTR(4,atpic_fastintr4, ENABLE_ICU1) + FAST_INTR(5,atpic_fastintr5, ENABLE_ICU1) + FAST_INTR(6,atpic_fastintr6, ENABLE_ICU1) + FAST_INTR(7,atpic_fastintr7, ENABLE_ICU1) + FAST_INTR(8,atpic_fastintr8, ENABLE_ICU1_AND_2) + FAST_INTR(9,atpic_fastintr9, ENABLE_ICU1_AND_2) + FAST_INTR(10,atpic_fastintr10, ENABLE_ICU1_AND_2) + FAST_INTR(11,atpic_fastintr11, ENABLE_ICU1_AND_2) + FAST_INTR(12,atpic_fastintr12, ENABLE_ICU1_AND_2) + FAST_INTR(13,atpic_fastintr13, ENABLE_ICU1_AND_2) + FAST_INTR(14,atpic_fastintr14, ENABLE_ICU1_AND_2) + FAST_INTR(15,atpic_fastintr15, ENABLE_ICU1_AND_2) #define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) /* Threaded interrupts */
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