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Date:      Fri, 20 Oct 2000 06:57:18 -0400
From:      "Otter" <otterr@telocity.com>
To:        "Mike Meyer" <mwm@mired.org>
Cc:        <questions@FreeBSD.ORG>
Subject:   RE: FW: booting problems with SMP enabled
Message-ID:  <HLEDJBJKDDPDJBMGCLPPKEEKCGAA.otterr@telocity.com>
In-Reply-To: <14831.46693.860465.246500@guru.mired.org>

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}-----Original Message-----
}From: owner-freebsd-questions@FreeBSD.ORG
}[mailto:owner-freebsd-questions@FreeBSD.ORG]On Behalf Of Mike Meyer
}Sent: Thursday, October 19, 2000 11:05 PM
}To: Otter
}Cc: questions@FreeBSD.ORG
}Subject: Re: FW: booting problems with SMP enabled
}
}
}Otter writes:
}> I've got a new install of 4.1-RELEASE here.
}> Hardware consists of a dual processor board (unknown brand),
}> 2 Intel P2-300's, a single 128MB DIMM, onboard scsi
}> (disabled), on a 13GB IDE drive. The machine boots and runs
}> fine with a single processor. For testing purposes, I've
}> swapped them around to make sure that both CPU's are working
}> as they should. No problems there. When I boot up with the
}> SMP kernel (only the SMP and APIC_IO lines uncommented) it
}> hangs in the boot process at where it says "APIC_IO: testing
}> 8254 interrupt delivery". At this point, the machine locks
}> and requires me cycling power via the switch on the power
}> supply. I'm at a loss. I've got a bank of dipdswitches on
}> the board and have changed a few at random, but no luck so
}> far. Without knowing the brand of the board, I'm not sure
}> how I can take this any further. Any tips/ideas/suggestions? TIA.
}
}Check the board manufacturers web site for a manual!
}
I'd love to, but as you can see above, I don't know who the
manufacturer is/was. I've found no markings on the board that identify
it as any particular brand.

}Also notice that "An SMP kernel will ONLY run on an Intel MP
}spec. qualified motherboard" and "Be sure to disable 'cpu
}I386_CPU' &&
}'cpu I486_CPU' for SMP kernels." (The latter may not be required for
}your version, but won't hurt in any case).

already done.

}
}Also, check the stepping number of the P2's (on the chip, somewhere,
}one hopes, or possibly in dmesg when the system boots) and then check
}the intel web to make sure the two chips will work *together*. While
}each may work fine, if you've don't have compatible stepping numbers,
}they won't work together.
}
}	<mike
}
The stepping numbers DO match. I've searched Intel's site and found
some CPUID info charts, but nothing that states they work together...
then again, I didn't find anything saying the contrary. I seem to
remember that was the big hype of P2 over Celerons-- they had more
cache and would support SMP. I could only assume that they all do...
and neer had problems getting any p2 or p3's to work in SMP as long as
the stepping numbers matched. I've set this up on several machines in
the past, so I know (or at least I used to!) what to look for and the
steps to take to make it happen. I'm just at a loss on this one.
-Otter



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