Date: Sat, 20 Oct 2007 17:58:28 GMT From: Marko Zec <zec@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 127824 for review Message-ID: <200710201758.l9KHwSKI032726@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=127824 Change 127824 by zec@zec_tpx32 on 2007/10/20 17:58:02 IFC @ 12781 Affected files ... .. //depot/projects/vimage/src/sys/amd64/conf/GENERIC#10 integrate .. //depot/projects/vimage/src/sys/arm/arm/cpufunc.c#5 integrate .. //depot/projects/vimage/src/sys/arm/arm/cpufunc_asm_arm11.S#1 branch .. //depot/projects/vimage/src/sys/arm/arm/cpufunc_asm_armv5.S#1 branch .. //depot/projects/vimage/src/sys/arm/arm/cpufunc_asm_armv5_ec.S#1 branch .. //depot/projects/vimage/src/sys/arm/arm/identcpu.c#3 integrate .. //depot/projects/vimage/src/sys/arm/at91/at91_mcireg.h#2 integrate .. //depot/projects/vimage/src/sys/arm/include/armreg.h#3 integrate .. //depot/projects/vimage/src/sys/arm/include/cpuconf.h#2 integrate .. //depot/projects/vimage/src/sys/arm/include/cpufunc.h#4 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/fil.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_auth.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_compat.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_fil.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_frag.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_htable.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_log.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_lookup.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_lookup.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_nat.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_nat.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_pool.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_pool.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_proxy.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_rpcb_pxy.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_scan.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_state.c#4 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_state.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ip_sync.c#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/ipl.h#3 integrate .. //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/mlfk_ipl.c#3 integrate .. //depot/projects/vimage/src/sys/dev/sound/pci/hda/hdac.c#13 integrate .. //depot/projects/vimage/src/sys/dev/usb/if_zyd.c#4 integrate .. //depot/projects/vimage/src/sys/dev/usb/uchcom.c#1 branch .. //depot/projects/vimage/src/sys/dev/usb/usbdevs#14 integrate .. //depot/projects/vimage/src/sys/fs/msdosfs/msdosfs_denode.c#4 integrate .. //depot/projects/vimage/src/sys/fs/msdosfs/msdosfs_lookup.c#4 integrate .. //depot/projects/vimage/src/sys/fs/msdosfs/msdosfs_vfsops.c#11 integrate .. //depot/projects/vimage/src/sys/fs/msdosfs/msdosfs_vnops.c#8 integrate .. //depot/projects/vimage/src/sys/i386/conf/GENERIC#12 integrate .. //depot/projects/vimage/src/sys/kern/syscalls.master#4 integrate .. //depot/projects/vimage/src/sys/modules/uchcom/Makefile#1 branch .. //depot/projects/vimage/src/sys/net/ethernet.h#6 integrate .. //depot/projects/vimage/src/sys/net/if_bridge.c#8 integrate .. //depot/projects/vimage/src/sys/net/if_ethersubr.c#16 integrate .. //depot/projects/vimage/src/sys/net/if_lagg.c#11 integrate .. //depot/projects/vimage/src/sys/net/if_vlan.c#6 integrate .. //depot/projects/vimage/src/sys/netgraph/netgraph.h#5 integrate .. //depot/projects/vimage/src/sys/netgraph/ng_base.c#21 integrate .. //depot/projects/vimage/src/sys/netgraph/ng_socket.c#3 integrate .. //depot/projects/vimage/src/sys/netinet/ip.h#4 integrate .. //depot/projects/vimage/src/sys/netinet/raw_ip.c#16 edit .. //depot/projects/vimage/src/sys/netinet/tcp_syncache.c#22 integrate .. //depot/projects/vimage/src/sys/netinet/tcp_usrreq.c#15 integrate .. //depot/projects/vimage/src/sys/nfsclient/nfs_vfsops.c#9 integrate .. //depot/projects/vimage/src/sys/nfsserver/nfs_serv.c#4 integrate .. //depot/projects/vimage/src/sys/sys/vnode.h#6 integrate .. //depot/projects/vimage/src/sys/vm/vm_mmap.c#6 integrate .. //depot/projects/vimage/src/sys/vm/vm_object.c#9 integrate Differences ... ==== //depot/projects/vimage/src/sys/amd64/conf/GENERIC#10 (text+ko) ==== @@ -16,7 +16,7 @@ # If you are in doubt as to the purpose or necessity of a line, check first # in NOTES. # -# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.484 2007/09/26 20:05:06 brueffer Exp $ +# $FreeBSD: src/sys/amd64/conf/GENERIC,v 1.485 2007/10/19 12:30:33 kensmith Exp $ cpu HAMMER ident GENERIC @@ -26,7 +26,7 @@ makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options SCHED_4BSD # 4BSD scheduler +options SCHED_ULE # ULE scheduler options PREEMPTION # Enable kernel thread preemption options INET # InterNETworking options INET6 # IPv6 communications protocols ==== //depot/projects/vimage/src/sys/arm/arm/cpufunc.c#5 (text+ko) ==== @@ -45,7 +45,7 @@ * Created : 30/01/97 */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.18 2007/08/07 18:37:21 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.19 2007/10/18 05:33:05 imp Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -296,6 +296,64 @@ }; #endif /* CPU_ARM9 */ +#if defined(CPU_ARM9E) || defined(CPU_ARM10) +struct cpu_functions armv5_ec_cpufuncs = { + /* CPU functions */ + + cpufunc_id, /* id */ + cpufunc_nullop, /* cpwait */ + + /* MMU functions */ + + cpufunc_control, /* control */ + cpufunc_domains, /* Domain */ + armv5_ec_setttb, /* Setttb */ + cpufunc_faultstatus, /* Faultstatus */ + cpufunc_faultaddress, /* Faultaddress */ + + /* TLB functions */ + + armv4_tlb_flushID, /* tlb_flushID */ + arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + armv4_tlb_flushI, /* tlb_flushI */ + arm10_tlb_flushI_SE, /* tlb_flushI_SE */ + armv4_tlb_flushD, /* tlb_flushD */ + armv4_tlb_flushD_SE, /* tlb_flushD_SE */ + + /* Cache operations */ + + armv5_ec_icache_sync_all, /* icache_sync_all */ + armv5_ec_icache_sync_range, /* icache_sync_range */ + + armv5_ec_dcache_wbinv_all, /* dcache_wbinv_all */ + armv5_ec_dcache_wbinv_range, /* dcache_wbinv_range */ +/*XXX*/ armv5_ec_dcache_wbinv_range, /* dcache_inv_range */ + armv5_ec_dcache_wb_range, /* dcache_wb_range */ + + armv5_ec_idcache_wbinv_all, /* idcache_wbinv_all */ + armv5_ec_idcache_wbinv_range, /* idcache_wbinv_range */ + + /* Other functions */ + + cpufunc_nullop, /* flush_prefetchbuf */ + armv4_drain_writebuf, /* drain_writebuf */ + cpufunc_nullop, /* flush_brnchtgt_C */ + (void *)cpufunc_nullop, /* flush_brnchtgt_E */ + + (void *)cpufunc_nullop, /* sleep */ + + /* Soft functions */ + + cpufunc_null_fixup, /* dataabt_fixup */ + cpufunc_null_fixup, /* prefetchabt_fixup */ + + arm10_context_switch, /* context_switch */ + + arm10_setup /* cpu setup */ + +}; +#endif /* CPU_ARM9E || CPU_ARM10 */ + #ifdef CPU_ARM10 struct cpu_functions arm10_cpufuncs = { /* CPU functions */ @@ -869,6 +927,16 @@ goto out; } #endif /* CPU_ARM9 */ +#if defined(CPU_ARM9E) || defined(CPU_ARM10) + if (cputype == CPU_ID_ARM926EJS || + cputype == CPU_ID_ARM1026EJS) { + cpufuncs = armv5_ec_cpufuncs; + cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ + get_cachetype_cp15(); + pmap_pte_init_generic(); + return 0; + } +#endif /* CPU_ARM9E || CPU_ARM10 */ #ifdef CPU_ARM10 if (/* cputype == CPU_ID_ARM1020T || */ cputype == CPU_ID_ARM1020E) { @@ -1434,10 +1502,12 @@ */ #if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined (CPU_ARM9) || \ + defined(CPU_ARM9E) || \ defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ - defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ + defined(CPU_ARM10) || defined(CPU_ARM11) #define IGN 0 #define OR 1 @@ -1679,7 +1749,7 @@ } #endif /* CPU_ARM9 */ -#ifdef CPU_ARM10 +#if defined(CPU_ARM9E) || defined(CPU_ARM10) struct cpu_option arm10_options[] = { { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, @@ -1722,7 +1792,7 @@ cpu_idcache_wbinv_all(); /* Now really make sure they are clean. */ - asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); + __asm __volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); /* Set the control register */ ctrl = cpuctrl; @@ -1731,7 +1801,57 @@ /* And again. */ cpu_idcache_wbinv_all(); } -#endif /* CPU_ARM10 */ +#endif /* CPU_ARM9E || CPU_ARM10 */ + +#ifdef CPU_ARM11 +struct cpu_option arm11_options[] = { + { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "arm11.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) }, + { "arm11.icache", BIC, OR, CPU_CONTROL_IC_ENABLE }, + { "arm11.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE }, + { NULL, IGN, IGN, 0 } +}; + +void +arm11_setup(args) + char *args; +{ + int cpuctrl, cpuctrlmask; + + cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE + | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE + /* | CPU_CONTROL_BPRD_ENABLE */; + cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE + | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE + | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE + | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE + | CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK; + +#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS + cpuctrl |= CPU_CONTROL_AFLT_ENABLE; +#endif + + cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl); + +#ifdef __ARMEB__ + cpuctrl |= CPU_CONTROL_BEND_ENABLE; +#endif + + /* Clear out the cache */ + cpu_idcache_wbinv_all(); + + /* Now really make sure they are clean. */ + __asm __volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : ); + + /* Set the control register */ + curcpu()->ci_ctrl = cpuctrl; + cpu_control(0xffffffff, cpuctrl); + + /* And again. */ + cpu_idcache_wbinv_all(); +} +#endif /* CPU_ARM11 */ #ifdef CPU_SA110 struct cpu_option sa110_options[] = { ==== //depot/projects/vimage/src/sys/arm/arm/identcpu.c#3 (text+ko) ==== @@ -42,7 +42,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.11 2007/07/27 14:49:11 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.12 2007/10/18 05:33:05 imp Exp $"); #include <sys/systm.h> #include <sys/param.h> #include <sys/malloc.h> @@ -70,9 +70,12 @@ CPU_CLASS_ARM8, CPU_CLASS_ARM9TDMI, CPU_CLASS_ARM9ES, + CPU_CLASS_ARM9EJS, CPU_CLASS_ARM10E, + CPU_CLASS_ARM10EJ, CPU_CLASS_SA1, - CPU_CLASS_XSCALE + CPU_CLASS_XSCALE, + CPU_CLASS_ARM11J }; static const char * const generic_steppings[16] = { @@ -119,6 +122,13 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +static const char * const i80219_steppings[16] = { + "step A-0", "rev 1", "rev 2", "rev 3", + "rev 4", "rev 5", "rev 6", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + static const char * const i80321_steppings[16] = { "step A-0", "step B-0", "rev 2", "rev 3", "rev 4", "rev 5", "rev 6", "rev 7", @@ -133,6 +143,7 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +/* Steppings for PXA2[15]0 */ static const char * const pxa2x0_steppings[16] = { "step A-0", "step A-1", "step B-0", "step B-1", "step B-2", "step C-0", "rev 6", "rev 7", @@ -140,6 +151,24 @@ "rev 12", "rev 13", "rev 14", "rev 15", }; +/* Steppings for PXA255/26x. + * rev 5: PXA26x B0, rev 6: PXA255 A0 + */ +static const char * const pxa255_steppings[16] = { + "rev 0", "rev 1", "rev 2", "step A-0", + "rev 4", "step B-0", "step A-0", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + +/* Stepping for PXA27x */ +static const char * const pxa27x_steppings[16] = { + "step A-0", "step A-1", "step B-0", "step B-1", + "step C-0", "rev 5", "rev 6", "rev 7", + "rev 8", "rev 9", "rev 10", "rev 11", + "rev 12", "rev 13", "rev 14", "rev 15", +}; + static const char * const ixp425_steppings[16] = { "step 0 (A0)", "rev 1 (ARMv5TE)", "rev 2", "rev 3", "rev 4", "rev 5", "rev 6", "rev 7", @@ -198,6 +227,8 @@ generic_steppings }, { CPU_ID_ARM922T, CPU_CLASS_ARM9TDMI, "ARM922T", generic_steppings }, + { CPU_ID_ARM926EJS, CPU_CLASS_ARM9EJS, "ARM926EJ-S", + generic_steppings }, { CPU_ID_ARM940T, CPU_CLASS_ARM9TDMI, "ARM940T", generic_steppings }, { CPU_ID_ARM946ES, CPU_CLASS_ARM9ES, "ARM946E-S", @@ -213,6 +244,8 @@ generic_steppings }, { CPU_ID_ARM1022ES, CPU_CLASS_ARM10E, "ARM1022E-S", generic_steppings }, + { CPU_ID_ARM1026EJS, CPU_CLASS_ARM10EJ, "ARM1026EJ-S", + generic_steppings }, { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110", sa110_steppings }, @@ -240,11 +273,12 @@ i81342_steppings }, { CPU_ID_80219_400, CPU_CLASS_XSCALE, "i80219 400MHz", - xscale_steppings }, - + i80219_steppings }, { CPU_ID_80219_600, CPU_CLASS_XSCALE, "i80219 600MHz", - xscale_steppings }, + i80219_steppings }, + { CPU_ID_PXA27X, CPU_CLASS_XSCALE, "PXA27x", + pxa27x_steppings }, { CPU_ID_PXA250A, CPU_CLASS_XSCALE, "PXA250", pxa2x0_steppings }, { CPU_ID_PXA210A, CPU_CLASS_XSCALE, "PXA210", @@ -253,8 +287,8 @@ pxa2x0_steppings }, { CPU_ID_PXA210B, CPU_CLASS_XSCALE, "PXA210", pxa2x0_steppings }, - { CPU_ID_PXA250C, CPU_CLASS_XSCALE, "PXA250", - pxa2x0_steppings }, + { CPU_ID_PXA250C, CPU_CLASS_XSCALE, "PXA255", + pxa255_steppings }, { CPU_ID_PXA210C, CPU_CLASS_XSCALE, "PXA210", pxa2x0_steppings }, @@ -265,6 +299,11 @@ { CPU_ID_IXP425_266, CPU_CLASS_XSCALE, "IXP425 266MHz", ixp425_steppings }, + { CPU_ID_ARM1136JS, CPU_CLASS_ARM11J, "ARM1136J-S", + generic_steppings }, + { CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S R1", + generic_steppings }, + { 0, CPU_CLASS_NONE, NULL, NULL } }; @@ -283,10 +322,13 @@ { "ARM7TDMI", "CPU_ARM7TDMI" }, /* CPU_CLASS_ARM7TDMI */ { "ARM8", "CPU_ARM8" }, /* CPU_CLASS_ARM8 */ { "ARM9TDMI", "CPU_ARM9TDMI" }, /* CPU_CLASS_ARM9TDMI */ - { "ARM9E-S", NULL }, /* CPU_CLASS_ARM9ES */ + { "ARM9E-S", "CPU_ARM9E" }, /* CPU_CLASS_ARM9ES */ + { "ARM9EJ-S", "CPU_ARM9E" }, /* CPU_CLASS_ARM9EJS */ { "ARM10E", "CPU_ARM10" }, /* CPU_CLASS_ARM10E */ + { "ARM10EJ", "CPU_ARM10" }, /* CPU_CLASS_ARM10EJ */ { "SA-1", "CPU_SA110" }, /* CPU_CLASS_SA1 */ { "XScale", "CPU_XSCALE_..." }, /* CPU_CLASS_XSCALE */ + { "ARM11J", "CPU_ARM11" }, /* CPU_CLASS_ARM11J */ }; /* @@ -310,7 +352,7 @@ "**unknown 11**", "**unknown 12**", "**unknown 13**", - "**unknown 14**", + "write-back-locking-C", "**unknown 15**", }; @@ -363,9 +405,13 @@ printf(" IDC enabled"); break; case CPU_CLASS_ARM9TDMI: + case CPU_CLASS_ARM9ES: + case CPU_CLASS_ARM9EJS: case CPU_CLASS_ARM10E: + case CPU_CLASS_ARM10EJ: case CPU_CLASS_SA1: case CPU_CLASS_XSCALE: + case CPU_CLASS_ARM11J: if ((ctrl & CPU_CONTROL_DC_ENABLE) == 0) printf(" DC disabled"); else ==== //depot/projects/vimage/src/sys/arm/at91/at91_mcireg.h#2 (text+ko) ==== @@ -23,10 +23,10 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* $FreeBSD: src/sys/arm/at91/at91_mcireg.h,v 1.1 2006/10/20 06:44:04 imp Exp $ */ +/* $FreeBSD: src/sys/arm/at91/at91_mcireg.h,v 1.2 2007/10/18 05:43:44 imp Exp $ */ -#ifndef ARM_AT91_AT91QDMMCREG_H -#define ARM_AT91_AT91QDMMCREG_H +#ifndef ARM_AT91_AT91_MCIREG_H +#define ARM_AT91_AT91_MCIREG_H #define MMC_MAX 30 @@ -125,4 +125,4 @@ #define AT91C_BUS_WIDTH_1BIT 0x00 #define AT91C_BUS_WIDTH_4BITS 0x02 -#endif /* ARM_AT91_AT91QDMMCREG_H */ +#endif /* ARM_AT91_AT91_MCIREG_H */ ==== //depot/projects/vimage/src/sys/arm/include/armreg.h#3 (text+ko) ==== @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.28 2003/10/31 16:30:15 scw Exp $ */ +/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ /*- * Copyright (c) 1998, 2001 Ben Harris @@ -35,11 +35,12 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/armreg.h,v 1.6 2007/07/27 14:54:27 cognet Exp $ + * $FreeBSD: src/sys/arm/include/armreg.h,v 1.7 2007/10/18 05:06:58 imp Exp $ */ #ifndef MACHINE_ARMREG_H #define MACHINE_ARMREG_H + #define INSN_SIZE 4 #define INSN_COND_MASK 0xf0000000 /* Condition mask */ #define PSR_MODE 0x0000001f /* mode mask */ @@ -65,6 +66,7 @@ #define CPU_ID_DEC 0x44000000 /* 'D' */ #define CPU_ID_INTEL 0x69000000 /* 'i' */ #define CPU_ID_TI 0x54000000 /* 'T' */ +#define CPU_ID_FARADAY 0x66000000 /* 'f' */ /* How to decide what format the CPUID is in. */ #define CPU_ID_ISOLD(x) (((x) & 0x0000f000) == 0x00000000) @@ -89,6 +91,8 @@ #define CPU_ID_ARCH_V5 0x00030000 #define CPU_ID_ARCH_V5T 0x00040000 #define CPU_ID_ARCH_V5TE 0x00050000 +#define CPU_ID_ARCH_V5TEJ 0x00060000 +#define CPU_ID_ARCH_V6 0x00070000 #define CPU_ID_VARIANT_MASK 0x00f00000 /* Next three nybbles are part number */ @@ -118,7 +122,7 @@ /* ARM7 CPUs -- [15:12] == 7 */ #define CPU_ID_ARM700 0x41007000 /* XXX This is a guess. */ #define CPU_ID_ARM710 0x41007100 -#define CPU_ID_ARM7500 0x41027100 /* XXX This is a guess. */ +#define CPU_ID_ARM7500 0x41027100 #define CPU_ID_ARM710A 0x41047100 /* inc ARM7100 */ #define CPU_ID_ARM7500FE 0x41077100 #define CPU_ID_ARM710T 0x41807100 @@ -131,15 +135,20 @@ #define CPU_ID_ARM920T 0x41129200 #define CPU_ID_ARM920T_ALT 0x41009200 #define CPU_ID_ARM922T 0x41029220 +#define CPU_ID_ARM926EJS 0x41069260 #define CPU_ID_ARM940T 0x41029400 /* XXX no MMU */ #define CPU_ID_ARM946ES 0x41049460 /* XXX no MMU */ #define CPU_ID_ARM966ES 0x41049660 /* XXX no MMU */ #define CPU_ID_ARM966ESR1 0x41059660 /* XXX no MMU */ #define CPU_ID_ARM1020E 0x4115a200 /* (AKA arm10 rev 1) */ #define CPU_ID_ARM1022ES 0x4105a220 +#define CPU_ID_ARM1026EJS 0x4106a260 +#define CPU_ID_ARM1136JS 0x4107b360 +#define CPU_ID_ARM1136JSR1 0x4117b360 #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250 +#define CPU_ID_FA526 0x66015260 #define CPU_ID_SA1110 0x6901b110 #define CPU_ID_IXP1200 0x6901c120 #define CPU_ID_80200 0x69052000 @@ -151,6 +160,7 @@ #define CPU_ID_PXA210B 0x69052920 /* 3rd version Core */ #define CPU_ID_PXA250C 0x69052d00 /* 4th version Core */ #define CPU_ID_PXA210C 0x69052d20 /* 4th version Core */ +#define CPU_ID_PXA27X 0x69054110 #define CPU_ID_80321_400 0x69052420 #define CPU_ID_80321_600 0x69052430 #define CPU_ID_80321_400_B0 0x69052c20 @@ -305,4 +315,6 @@ #define INSN_COND_MASK 0xf0000000 /* Condition mask */ #define INSN_COND_AL 0xe0000000 /* Always condition */ +#define THUMB_INSN_SIZE 2 /* Some are 4 bytes. */ + #endif /* !MACHINE_ARMREG_H */ ==== //depot/projects/vimage/src/sys/arm/include/cpuconf.h#2 (text+ko) ==== @@ -34,7 +34,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.10 2006/11/30 23:30:40 cognet Exp $ + * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.11 2007/10/18 05:33:06 imp Exp $ * */ @@ -50,12 +50,22 @@ /* * Step 1: Count the number of CPU types configured into the kernel. */ -#define CPU_NTYPES 2 +#define CPU_NTYPES (defined(CPU_ARM7TDMI) + \ + defined(CPU_ARM8) + defined(CPU_ARM9) + \ + defined(CPU_ARM9E) + \ + defined(CPU_ARM10) + \ + defined(CPU_ARM11) + \ + defined(CPU_SA110) + defined(CPU_SA1100) + \ + defined(CPU_SA1110) + \ + defined(CPU_IXP12X0) + \ + defined(CPU_XSCALE_80200) + \ + defined(CPU_XSCALE_80321) + \ + defined(__CPU_XSCALE_PXA2XX) + \ + defined(CPU_XSCALE_IXP425)) /* * Step 2: Determine which ARM architecture versions are configured. */ - #if (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \ defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_IXP12X0) || defined(CPU_XSCALE_IXP425)) @@ -64,20 +74,35 @@ #define ARM_ARCH_4 0 #endif -#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ - defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ - defined(CPU_XSCALE_PXA2X0)) || defined(CPU_ARM10) +#if (defined(CPU_ARM9E) || defined(CPU_ARM10) || \ + defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ + defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ + defined(CPU_XSCALE_PXA2X0)) #define ARM_ARCH_5 1 #else #define ARM_ARCH_5 0 #endif -#define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5) +#if defined(CPU_ARM11) +#define ARM_ARCH_6 1 +#else +#define ARM_ARCH_6 0 +#endif + +#define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6) #if ARM_NARCH == 0 && !defined(KLD_MODULE) && defined(_KERNEL) #error ARM_NARCH is 0 #endif +#if ARM_ARCH_5 || ARM_ARCH_6 /* + * We could support Thumb code on v4T, but the lack of clean interworking + * makes that hard. + */ +#define THUMB_CODE +#endif + +/* * Step 3: Define which MMU classes are configured: * * ARM_MMU_MEMC Prehistoric, external memory controller @@ -99,7 +124,8 @@ #endif #if (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) || \ - defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM10)) + defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM9E) || \ + defined(CPU_ARM10) || defined(CPU_ARM11)) #define ARM_MMU_GENERIC 1 #else #define ARM_MMU_GENERIC 0 ==== //depot/projects/vimage/src/sys/arm/include/cpufunc.h#4 (text+ko) ==== @@ -38,7 +38,7 @@ * * Prototypes for cpu, mmu and tlb related functions. * - * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.12 2007/07/27 14:39:41 cognet Exp $ + * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.13 2007/10/18 05:33:06 imp Exp $ */ #ifndef _MACHINE_CPUFUNC_H_ @@ -351,7 +351,7 @@ extern unsigned arm9_dcache_index_inc; #endif -#ifdef CPU_ARM10 +#if defined(CPU_ARM9E) || defined(CPU_ARM10) void arm10_setttb (u_int); void arm10_tlb_flushID_SE (u_int); @@ -378,8 +378,60 @@ extern unsigned arm10_dcache_index_inc; #endif -#if defined(CPU_ARM9) || defined(CPU_ARM10) || defined(CPU_SA110) || \ - defined(CPU_SA1100) || defined(CPU_SA1110) || \ +#ifdef CPU_ARM11 +void arm11_setttb (u_int); + +void arm11_tlb_flushID_SE (u_int); +void arm11_tlb_flushI_SE (u_int); + +void arm11_context_switch (void); + +void arm11_setup (char *string); +void arm11_tlb_flushID (void); +void arm11_tlb_flushI (void); +void arm11_tlb_flushD (void); +void arm11_tlb_flushD_SE (u_int va); + +void arm11_drain_writebuf (void); +#endif + +#if defined(CPU_ARM9E) || defined (CPU_ARM10) +void armv5_ec_setttb(u_int); + +void armv5_ec_icache_sync_all(void); +void armv5_ec_icache_sync_range(vm_offset_t, vm_size_t); + +void armv5_ec_dcache_wbinv_all(void); +void armv5_ec_dcache_wbinv_range(vm_offset_t, vm_size_t); +void armv5_ec_dcache_inv_range(vm_offset_t, vm_size_t); +void armv5_ec_dcache_wb_range(vm_offset_t, vm_size_t); + +void armv5_ec_idcache_wbinv_all(void); +void armv5_ec_idcache_wbinv_range(vm_offset_t, vm_size_t); +#endif + +#if defined (CPU_ARM10) || defined (CPU_ARM11) +void armv5_setttb(u_int); + +void armv5_icache_sync_all(void); +void armv5_icache_sync_range(vm_offset_t, vm_size_t); + +void armv5_dcache_wbinv_all(void); +void armv5_dcache_wbinv_range(vm_offset_t, vm_size_t); +void armv5_dcache_inv_range(vm_offset_t, vm_size_t); +void armv5_dcache_wb_range(vm_offset_t, vm_size_t); + +void armv5_idcache_wbinv_all(void); +void armv5_idcache_wbinv_range(vm_offset_t, vm_size_t); + +extern unsigned armv5_dcache_sets_max; +extern unsigned armv5_dcache_sets_inc; +extern unsigned armv5_dcache_index_max; +extern unsigned armv5_dcache_index_inc; +#endif + +#if defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_ARM10) || \ + defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \ defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) ==== //depot/projects/vimage/src/sys/contrib/ipfilter/netinet/fil.c#3 (text+ko) ==== @@ -1,4 +1,4 @@ -/* $FreeBSD: src/sys/contrib/ipfilter/netinet/fil.c,v 1.52 2007/06/09 09:28:36 darrenr Exp $ */ +/* $FreeBSD: src/sys/contrib/ipfilter/netinet/fil.c,v 1.53 2007/10/18 21:52:13 darrenr Exp $ */ /* * Copyright (C) 1993-2003 by Darren Reed. @@ -82,7 +82,7 @@ #ifdef sun # include <net/af.h> #endif -#if !defined(_KERNEL) && defined(__FreeBSD__) +#if !defined(_KERNEL) && (defined(__FreeBSD__) || defined(SOLARIS2)) # if (__FreeBSD_version >= 504000) # undef _RADIX_H_ # endif @@ -155,8 +155,8 @@ #if !defined(lint) static const char sccsid[] = "@(#)fil.c 1.36 6/5/96 (C) 1993-2000 Darren Reed"; -static const char rcsid[] = "@(#)$FreeBSD: src/sys/contrib/ipfilter/netinet/fil.c,v 1.52 2007/06/09 09:28:36 darrenr Exp $"; -/* static const char rcsid[] = "@(#)$Id: fil.c,v 2.243.2.78 2006/03/29 11:19:54 darrenr Exp $"; */ +static const char rcsid[] = "@(#)$FreeBSD: src/sys/contrib/ipfilter/netinet/fil.c,v 1.53 2007/10/18 21:52:13 darrenr Exp $"; +/* static const char rcsid[] = "@(#)$Id: fil.c,v 2.243.2.125 2007/10/10 09:27:20 darrenr Exp $"; */ #endif #ifndef _KERNEL @@ -362,7 +362,7 @@ static INLINE int frpr_mobility6 __P((fr_info_t *)); static INLINE int frpr_routing6 __P((fr_info_t *)); static INLINE int frpr_dstopts6 __P((fr_info_t *)); -static INLINE void frpr_fragment6 __P((fr_info_t *)); +static INLINE int frpr_fragment6 __P((fr_info_t *)); static INLINE int frpr_ipv6exthdr __P((fr_info_t *, int, int)); @@ -480,8 +480,9 @@ break; case IPPROTO_FRAGMENT : - frpr_fragment6(fin); - go = 0; + p = frpr_fragment6(fin); + if (fin->fin_off != 0) + go = 0; break; default : @@ -652,7 +653,7 @@ /* ------------------------------------------------------------------------ */ /* Function: frpr_fragment6 */ -/* Returns: void */ +/* Returns: int - value of the next header or IPPROTO_NONE if error */ /* Parameters: fin(I) - pointer to packet information */ /* */ /* IPv6 Only */ @@ -664,7 +665,7 @@ /* upper layer header has been seen (or where it ends) and thus we are not */ /* able to continue processing beyond this header with any confidence. */ /* ------------------------------------------------------------------------ */ -static INLINE void frpr_fragment6(fin) +static INLINE int frpr_fragment6(fin) fr_info_t *fin; { struct ip6_frag *frag; @@ -673,12 +674,12 @@ fin->fin_flx |= FI_FRAG; if (frpr_ipv6exthdr(fin, 0, IPPROTO_FRAGMENT) == IPPROTO_NONE) - return; + return IPPROTO_NONE; extoff = (char *)fin->fin_exthdr - (char *)fin->fin_dp; if (frpr_pullup(fin, sizeof(*frag)) == -1) - return; + return IPPROTO_NONE; fin->fin_exthdr = (char *)fin->fin_dp + extoff; frag = fin->fin_exthdr; @@ -687,16 +688,18 @@ */ if (frag->ip6f_offlg == 0) { fin->fin_flx |= FI_BAD; - return; + return IPPROTO_NONE; } - fin->fin_off = frag->ip6f_offlg & IP6F_OFF_MASK; + fin->fin_off = ntohs(frag->ip6f_offlg & IP6F_OFF_MASK); fin->fin_off <<= 3; if (fin->fin_off != 0) fin->fin_flx |= FI_FRAGBODY; fin->fin_dp = (char *)fin->fin_dp + sizeof(*frag); fin->fin_dlen -= sizeof(*frag); + + return frag->ip6f_nxt; } @@ -752,15 +755,15 @@ case ICMP6_TIME_EXCEEDED : case ICMP6_PARAM_PROB : fin->fin_flx |= FI_ICMPERR; - if ((fin->fin_m != NULL) && - (M_LEN(fin->fin_m) < fin->fin_plen)) { + minicmpsz = ICMP6ERR_IPICMPHLEN - sizeof(ip6_t); + if (fin->fin_plen < ICMP6ERR_IPICMPHLEN) + break; + + if (M_LEN(fin->fin_m) < fin->fin_plen) { if (fr_coalesce(fin) != 1) return; } - if (frpr_pullup(fin, ICMP6ERR_MINPKTLEN) == -1) - return; - /* * If the destination of this packet doesn't match the * source of the original packet then this packet is @@ -772,7 +775,6 @@ (i6addr_t *)&ip6->ip6_src)) fin->fin_flx |= FI_BAD; - minicmpsz = ICMP6ERR_IPICMPHLEN - sizeof(ip6_t); break; default : break; @@ -913,6 +915,14 @@ /* Short inline function to cut down on code duplication to perform a call */ /* to fr_pullup to ensure there is the required amount of data, */ /* consecutively in the packet buffer. */ +/* */ +/* This function pulls up 'extra' data at the location of fin_dp. fin_dp */ +/* points to the first byte after the complete layer 3 header, which will */ +/* include all of the known extension headers for IPv6 or options for IPv4. */ +/* */ +/* Since fr_pullup() expects the total length of bytes to be pulled up, it */ +/* is necessary to add those we can already assume to be pulled up (fin_dp */ +/* - fin_ip) to what is passed through. */ /* ------------------------------------------------------------------------ */ static INLINE int frpr_pullup(fin, plen) fr_info_t *fin; @@ -1001,6 +1011,9 @@ fin->fin_data[0] = *(u_short *)icmp; + if (fin->fin_dlen >= 6) /* ID field */ + fin->fin_data[1] = icmp->icmp_id; + switch (icmp->icmp_type) { case ICMP_ECHOREPLY : @@ -1071,14 +1084,12 @@ default : break; } - - if (fin->fin_dlen >= 6) /* ID field */ - fin->fin_data[1] = icmp->icmp_id; } frpr_short(fin, minicmpsz); - fr_checkv4sum(fin); + if ((fin->fin_flx & FI_FRAG) == 0) + fr_checkv4sum(fin); } @@ -1194,6 +1205,7 @@ return -1; #if 0 + tcp = fin->fin_dp; ip = fin->fin_ip; s = (u_char *)(tcp + 1); off = IP_HL(ip) << 2; @@ -1281,8 +1293,10 @@ frpr_short(fin, sizeof(tcphdr_t)); - if (frpr_tcpcommon(fin) == 0) - fr_checkv4sum(fin); + if (frpr_tcpcommon(fin) == 0) { + if ((fin->fin_flx & FI_FRAG) == 0) + fr_checkv4sum(fin); + } } @@ -1300,8 +1314,10 @@ frpr_short(fin, sizeof(udphdr_t)); - if (frpr_udpcommon(fin) == 0) - fr_checkv4sum(fin); + if (frpr_udpcommon(fin) == 0) { + if ((fin->fin_flx & FI_FRAG) == 0) + fr_checkv4sum(fin); + } } @@ -1951,7 +1967,7 @@ fr_info_t *fin; u_32_t pass; { - int rulen, portcmp, off, logged, skip; + int rulen, portcmp, off, skip; struct frentry *fr, *fnext; u_32_t passt, passo; @@ -1970,7 +1986,6 @@ return pass; skip = 0; - logged = 0; portcmp = 0; fin->fin_depth++; fin->fin_fr = NULL; @@ -2104,7 +2119,7 @@ ATOMIC_INCL(frstats[fin->fin_out].fr_skip); } ATOMIC_INCL(frstats[fin->fin_out].fr_pkl); - logged = 1; + fin->fin_flx |= FI_DONTCACHE; } #endif /* IPFILTER_LOG */ fr->fr_bytes += (U_QUAD_T)fin->fin_plen; @@ -2129,8 +2144,6 @@ fin->fin_fr = fr; passt = pass; } - if (fin->fin_flx & FI_DONTCACHE) - logged = 1; pass = passt; } @@ -2158,8 +2171,6 @@ break; } } - if (logged) - fin->fin_flx |= FI_DONTCACHE; fin->fin_depth--; return pass; } @@ -2410,8 +2421,10 @@ # ifdef MENTAT qpktinfo_t *qpi = qif; +# if !defined(_INET_IP_STACK_H) if ((u_int)ip & 0x3) return 2; +# endif # else SPL_INT(s); # endif @@ -2564,11 +2577,20 @@ if (!out) (void) fr_acctpkt(fin, NULL); - if (fr == NULL) - if ((fin->fin_flx & (FI_FRAG|FI_BAD)) == FI_FRAG) + if (fr == NULL) { + if ((fin->fin_flx & (FI_FRAG|FI_BAD)) == FI_FRAG) { fr = fr_knownfrag(fin, &pass); - if (fr == NULL) - fr = fr_checkstate(fin, &pass); + /* + * Reset the keep state flag here so that we don't + * try and add a new state entry because of it, leading + * to a blocked packet because the add will fail. >>> TRUNCATED FOR MAIL (1000 lines) <<<
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200710201758.l9KHwSKI032726>