Date: Thu, 19 Apr 2001 10:41:49 -1000 (HST) From: Vincent Poy <vince@oahu.WURLDLINK.NET> To: Jeremiah Gowdy <jgowdy@home.com> Cc: Charles Burns <burnscharlesn@hotmail.com>, <lplist@closedsrc.org>, <kris@obsecurity.org>, <mwlist@lanfear.com>, <freebsd@sysmach.com>, <questions@FreeBSD.ORG> Subject: Re: the AMD factor in FreeBSD Message-ID: <Pine.BSF.4.31.0104191041081.4840-100000@oahu.WURLDLINK.NET> In-Reply-To: <001f01c0c8e3$f3164bf0$015778d8@sherline.net>
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On Thu, 19 Apr 2001, Jeremiah Gowdy wrote: > > > Note that the AMD and Intel chips aren't slower because of incompetence. > > > They need to remain backwards-compatible with the 8086 instruction set > and > > > some of its methods of doing things. The 8086 processor sucks. It's > > > architecture and design suck. They were never meant for general purpose > > > computing--more for operating dishwashers and the like. The fact that > they > > > have advanced so far is a testament to the ingenuity of humanity--and to > the > > > stubbornness. > > > Blame IBM. ;-) > > > > Hehe... I thought the AMD/Intel were both CISC while the PowerPC > > is RISC created by IBM/Motorola/Apple. I guess until the 486, the x86 > > architecture was no match for workstations. > > All Intel and AMD x86 cpus today are RISC processors. They implement their > own hidden custom RISC architecture internally. The x86 CISC instructions > are translated into fixed length RISC instructions before they are > processed. Somehow I thought the Intel and AMD x86 CPUs were CISC and had a portion that was RISC. Cheers, Vince - vince@WURLDLINK.NET - Vice President ________ __ ____ Unix Networking Operations - FreeBSD-Real Unix for Free / / / / | / |[__ ] WurldLink Corporation / / / / | / | __] ] San Francisco - Honolulu - Hong Kong / / / / / |/ / | __] ] HongKong Stars/Gravis UltraSound Mailing Lists Admin /_/_/_/_/|___/|_|[____] Almighty1@IRC - oahu.DAL.NET Hawaii's DALnet IRC Network Server Admin To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
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