Date: Thu, 12 Oct 2017 08:09:44 +0000 (UTC) From: Sunpoet Po-Chuan Hsieh <sunpoet@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r451814 - head/cad/p5-Verilog-Perl Message-ID: <201710120809.v9C89ilk057798@repo.freebsd.org>
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Author: sunpoet Date: Thu Oct 12 08:09:44 2017 New Revision: 451814 URL: https://svnweb.freebsd.org/changeset/ports/451814 Log: Convert to test framework Approved by: portmgr (blanket) Modified: head/cad/p5-Verilog-Perl/Makefile Modified: head/cad/p5-Verilog-Perl/Makefile ============================================================================== --- head/cad/p5-Verilog-Perl/Makefile Thu Oct 12 08:09:38 2017 (r451813) +++ head/cad/p5-Verilog-Perl/Makefile Thu Oct 12 08:09:44 2017 (r451814) @@ -24,7 +24,4 @@ post-install: ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Parser/*.so ${STRIP_CMD} ${STAGEDIR}${PREFIX}/${SITE_ARCH_REL}/auto/Verilog/Preproc/*.so -regression-test: build - make test -C ${WRKSRC} - .include <bsd.port.mk>
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