Date: Thu, 11 Apr 1996 17:52:55 GMT From: Matt Thomas <matt@lkg.dec.com> To: FreeBSD-gnats-submit@freebsd.org Subject: kern/1134: PPB support is broken Message-ID: <199604111752.RAA10026@whydos.lkg.dec.com> Resent-Message-ID: <199604112230.PAA18496@freefall.freebsd.org>
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>Number: 1134
>Category: kern
>Synopsis: PPB support is broken for multiple/unknown PPBs.
>Confidential: no
>Severity: serious
>Priority: high
>Responsible: freebsd-bugs
>State: open
>Class: sw-bug
>Submitter-Id: current-users
>Arrival-Date: Thu Apr 11 15:30:01 PDT 1996
>Last-Modified:
>Originator: Matt Thomas
>Organization:
3am Software
>Release: FreeBSD 2.1-STABLE i386
>Environment:
Any PCI system with multiple PCI-PCI bridges or a system
with a PPB other than a DC21050.
>Description:
FreeBSD 2.1.0 does not handle PCI-PCI bridges if they have
a bus > 1, there are multiple bridges, or the bridge is
not a DC21050.
>How-To-Repeat:
Insert hardware as indicated above.
>Fix:
--- pci.c.orig Mon Oct 9 06:35:59 1995
+++ pci.c Fri Jan 19 13:37:46 1996
@@ -364,7 +364,7 @@
*/
pci_bridge_config ();
- printf ("Probing for devices on the PCI bus:\n");
+ printf ("Probing for devices on PCI bus %d:\n", pcicb->pcicb_bus);
#ifndef PCI_QUIET
if (bootverbose && !pci_info_done) {
pci_info_done=1;
@@ -603,7 +603,7 @@
if (bootverbose) {
printf ("\tbridge from pci%d to pci%d through %d.\n",
primary, secondary, subordinate);
- printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx",
+ printf ("\tmapping regs: io:%08lx mem:%08lx pmem:%08lx\n",
pci_conf_read (tag, PCI_PCI_BRIDGE_IO_REG),
pci_conf_read (tag, PCI_PCI_BRIDGE_MEM_REG),
pci_conf_read (tag, PCI_PCI_BRIDGE_PMEM_REG));
--- pcireg.h.orig Fri Jan 19 13:38:41 1996
+++ pcireg.h Fri Jan 19 13:30:46 1996
@@ -158,9 +158,9 @@
#define PCI_SECONDARY_BUS_MASK 0x0000ff00
#define PCI_PRIMARY_BUS_MASK 0x000000ff
-#define PCI_SUBORDINATE_BUS_EXTRACT(x) (((x) > 16) & 0xff)
-#define PCI_SECONDARY_BUS_EXTRACT(x) (((x) > 8) & 0xff)
-#define PCI_PRIMARY_BUS_EXTRACT(x) (((x) ) & 0xff)
+#define PCI_SUBORDINATE_BUS_EXTRACT(x) (((x) >> 16) & 0xff)
+#define PCI_SECONDARY_BUS_EXTRACT(x) (((x) >> 8) & 0xff)
+#define PCI_PRIMARY_BUS_EXTRACT(x) (((x) ) & 0xff)
#define PCI_PRIMARY_BUS_INSERT(x, y) (((x) & ~PCI_PRIMARY_BUS_MASK) | ((y) << 0))
#define PCI_SECONDARY_BUS_INSERT(x, y) (((x) & ~PCI_SECONDARY_BUS_MASK) | ((y) << 8))
--- pcisupport.c.orig Sat Sep 9 23:10:21 1995
+++ pcisupport.c Fri Jan 19 11:59:39 1996
@@ -84,14 +84,14 @@
static char*
chipset_probe (pcici_t tag, pcidi_t type)
{
- unsigned rev;
+ unsigned data;
switch (type) {
case 0x04868086:
return ("Intel 82425EX PCI system controller");
case 0x04848086:
- rev = (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff;
- if (rev == 3)
+ data = (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff;
+ if (data == 3)
return ("Intel 82378ZB PCI-ISA bridge");
return ("Intel 82378IB PCI-ISA bridge");
case 0x04838086:
@@ -99,8 +99,8 @@
case 0x04828086:
return ("Intel 82375EB PCI-EISA bridge");
case 0x04a38086:
- rev = (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff;
- if (rev == 16 || rev == 17)
+ data = (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff;
+ if (data == 16 || data == 17)
return ("Intel 82434NX (Neptune) PCI cache memory controller");
return ("Intel 82434LX (Mercury) PCI cache memory controller");
case 0x122d8086:
@@ -119,7 +119,12 @@
return ("SiS 85c601");
case 0x00011011:
return ("DEC 21050 PCI-PCI bridge");
- };
+ default:
+ data = pci_conf_read(tag, PCI_CLASS_REG);
+ if ((data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) == (PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI))
+ return ("PCI-PCI bridge");
+ break;
+ }
return ((char*)0);
}
>Audit-Trail:
>Unformatted:
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