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Date:      Thu, 25 Feb 2010 14:52:14 GMT
From:      Rafal Jaworowski <raj@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 175074 for review
Message-ID:  <201002251452.o1PEqED6080135@repoman.freebsd.org>

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http://p4web.freebsd.org/chv.cgi?CH=175074

Change 175074 by raj@raj_fdt on 2010/02/25 14:51:57

	Clean up Orion/88F5XXX and fix build.

Affected files ...

.. //depot/projects/fdt/sys/arm/mv/orion/db88f5xxx.c#2 edit
.. //depot/projects/fdt/sys/arm/mv/orion/orion.c#2 edit

Differences ...

==== //depot/projects/fdt/sys/arm/mv/orion/db88f5xxx.c#2 (text+ko) ====

@@ -150,6 +150,7 @@
 };
 #endif
 
+#if 0
 /*
  * mv_gpio_config row structure:
  *	<GPIO number>, <GPIO flags>, <GPIO mode>
@@ -182,62 +183,7 @@
 };
 #endif
 
-void
-platform_mpp_init(void)
-{
-
-	/*
-	 * MPP configuration for DB-88F5281
-	 *
-	 * MPP[2]:  PCI_REQn[3]
-	 * MPP[3]:  PCI_GNTn[3]
-	 * MPP[4]:  PCI_REQn[4]
-	 * MPP[5]:  PCI_GNTn[4]
-	 * MPP[6]:  <UNKNOWN>
-	 * MPP[7]:  <UNKNOWN>
-	 * MPP[8]:  <UNKNOWN>
-	 * MPP[9]:  <UNKNOWN>
-	 * MPP[14]: NAND Flash REn[2]
-	 * MPP[15]: NAND Flash WEn[2]
-	 * MPP[16]: UA1_RXD
-	 * MPP[17]: UA1_TXD
-	 * MPP[18]: UA1_CTS
-	 * MPP[19]: UA1_RTS
-	 *
-	 * Others:  GPIO
-	 *
-	 * <UNKNOWN> entries are not documented, not on the schematics etc.
-	 */
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL0, 0x33222203);
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL1, 0x44000033);
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL2, 0x00000000);
-
-#if 0
-	/*
-	 * MPP configuration for DB-88F5182
-	 *
-	 * MPP[2]:  PCI_REQn[3]
-	 * MPP[3]:  PCI_GNTn[3]
-	 * MPP[4]:  PCI_REQn[4]
-	 * MPP[5]:  PCI_GNTn[4]
-	 * MPP[6]:  SATA0_ACT
-	 * MPP[7]:  SATA1_ACT
-	 * MPP[12]: SATA0_PRESENT
-	 * MPP[13]: SATA1_PRESENT
-	 * MPP[14]: NAND_FLASH_REn[2]
-	 * MPP[15]: NAND_FLASH_WEn[2]
-	 * MPP[16]: UA1_RXD
-	 * MPP[17]: UA1_TXD
-	 * MPP[18]: UA1_CTS
-	 * MPP[19]: UA1_RTS
-	 *
-	 * Others:  GPIO
-	 */
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL0, 0x55222203);
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL1, 0x44550000);
-	bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL2, 0x00000000);
 #endif
-}
 
 static void
 platform_identify(void *dummy)

==== //depot/projects/fdt/sys/arm/mv/orion/orion.c#2 (text+ko) ====

@@ -44,61 +44,6 @@
 
 extern const struct obio_pci_irq_map pci_irq_map[];
 
-struct obio_device obio_devices[] = {
-	{ "ic", MV_IC_BASE, MV_IC_SIZE,
-		{ -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "timer", MV_TIMERS_BASE, MV_TIMERS_SIZE,
-		{ MV_INT_BRIDGE, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "gpio", MV_GPIO_BASE, MV_GPIO_SIZE,
-		{ MV_INT_GPIO7_0, MV_INT_GPIO15_8,
-		  MV_INT_GPIO23_16, MV_INT_GPIO31_24, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "uart", MV_UART0_BASE, MV_UART_SIZE,
-		{ MV_INT_UART0, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "uart", MV_UART1_BASE, MV_UART_SIZE,
-		{ MV_INT_UART1, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "idma", MV_IDMA_BASE, MV_IDMA_SIZE,
-		{ MV_INT_IDMA_ERR, MV_INT_IDMA0, MV_INT_IDMA1,
-		  MV_INT_IDMA2, MV_INT_IDMA3, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "ehci", MV_USB0_BASE, MV_USB_SIZE,
-		{ MV_INT_USB_BERR, MV_INT_USB_CI, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "mge", MV_ETH0_BASE, MV_ETH_SIZE,
-		{ MV_INT_GBERX, MV_INT_GBETX, MV_INT_GBEMISC,
-		  MV_INT_GBESUM, MV_INT_GBEERR, -1 },
-		{ -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "twsi", MV_TWSI0_BASE, MV_TWSI_SIZE,
-		{ -1 }, { -1 },
-		CPU_PM_CTRL_NONE
-	},
-	{ "sata", MV_SATAHC_BASE, MV_SATAHC_SIZE,
-	        { MV_INT_SATA, -1 }, { -1 },
-	        CPU_PM_CTRL_NONE
- 	},
-	{ NULL, 0, 0, { 0 } }
-};
-
 const struct obio_pci mv_pci_info[] = {
 	{ MV_TYPE_PCIE,
 		MV_PCIE_BASE,	MV_PCIE_SIZE,
@@ -126,22 +71,7 @@
 	{ -1, 0 }
 };
 
-const struct decode_win cpu_win_tbl[] = {
-	/* Device bus BOOT */
-	{ 1, 0x0f, MV_DEV_BOOT_PHYS_BASE, MV_DEV_BOOT_SIZE, -1 },
-
-	/* Device bus CS0 */
-	{ 1, 0x1e, MV_DEV_CS0_PHYS_BASE, MV_DEV_CS0_SIZE, -1 },
-
-	/* Device bus CS1 */
-	{ 1, 0x1d, MV_DEV_CS1_PHYS_BASE, MV_DEV_CS1_SIZE, -1 },
-
-	/* Device bus CS2 */
-	{ 1, 0x1b, MV_DEV_CS2_PHYS_BASE, MV_DEV_CS2_SIZE, -1 },
-};
-const struct decode_win *cpu_wins = cpu_win_tbl;
-int cpu_wins_no = sizeof(cpu_win_tbl) / sizeof(struct decode_win);
-
+/* TODO convert this to DT-derived approach. */
 /*
  * Note: the decode windows table for IDMA does not explicitly have DRAM
  * entries, which are not statically defined: active DDR banks (== windows)



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