From owner-svn-src-all@FreeBSD.ORG Sun Mar 14 23:23:57 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6F4D9106566B; Sun, 14 Mar 2010 23:23:57 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 534528FC23; Sun, 14 Mar 2010 23:23:57 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o2ENNvOt084709; Sun, 14 Mar 2010 23:23:57 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o2ENNvfW084707; Sun, 14 Mar 2010 23:23:57 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201003142323.o2ENNvfW084707@svn.freebsd.org> From: Pyun YongHyeon Date: Sun, 14 Mar 2010 23:23:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r205161 - head/sys/dev/msk X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2010 23:23:57 -0000 Author: yongari Date: Sun Mar 14 23:23:57 2010 New Revision: 205161 URL: http://svn.freebsd.org/changeset/base/205161 Log: It seems PCI_OUR_REG_[1-5] registers are not mapped on PCI configuration space on Yukon Ultra(88E8056) such that accesses to these registers were NOPs which in turn make msk(4) instable on this controller. Use indirect access method to access PCI_OUR_REG_[1-5] registers. This should fix a long standing instability bug which prevented msk(4) working on Yukon Ultra. Special thanks to koitsu who gave me remote access to his system. PR: kern/114631, kern/116853 MFC after: 1 week Modified: head/sys/dev/msk/if_msk.c Modified: head/sys/dev/msk/if_msk.c ============================================================================== --- head/sys/dev/msk/if_msk.c Sun Mar 14 22:38:18 2010 (r205160) +++ head/sys/dev/msk/if_msk.c Sun Mar 14 23:23:57 2010 (r205161) @@ -1212,7 +1212,7 @@ msk_phy_power(struct msk_softc *sc, int */ CSR_WRITE_1(sc, B2_Y2_CLK_GATE, val); - val = pci_read_config(sc->msk_dev, PCI_OUR_REG_1, 4); + val = CSR_PCI_READ_4(sc, PCI_OUR_REG_1); val &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); if (sc->msk_hw_id == CHIP_ID_YUKON_XL) { if (sc->msk_hw_rev > CHIP_REV_YU_XL_A1) { @@ -1223,7 +1223,7 @@ msk_phy_power(struct msk_softc *sc, int } } /* Release PHY from PowerDown/COMA mode. */ - pci_write_config(sc->msk_dev, PCI_OUR_REG_1, val, 4); + CSR_PCI_WRITE_4(sc, PCI_OUR_REG_1, val); switch (sc->msk_hw_id) { case CHIP_ID_YUKON_EC_U: case CHIP_ID_YUKON_EX: @@ -1232,16 +1232,16 @@ msk_phy_power(struct msk_softc *sc, int CSR_WRITE_2(sc, B0_CTST, Y2_HW_WOL_OFF); /* Enable all clocks. */ - pci_write_config(sc->msk_dev, PCI_OUR_REG_3, 0, 4); - our = pci_read_config(sc->msk_dev, PCI_OUR_REG_4, 4); + CSR_PCI_WRITE_4(sc, PCI_OUR_REG_3, 0); + our = CSR_PCI_READ_4(sc, PCI_OUR_REG_4); our &= (PCI_FORCE_ASPM_REQUEST|PCI_ASPM_GPHY_LINK_DOWN| PCI_ASPM_INT_FIFO_EMPTY|PCI_ASPM_CLKRUN_REQUEST); /* Set all bits to 0 except bits 15..12. */ - pci_write_config(sc->msk_dev, PCI_OUR_REG_4, our, 4); - our = pci_read_config(sc->msk_dev, PCI_OUR_REG_5, 4); + CSR_PCI_WRITE_4(sc, PCI_OUR_REG_4, our); + our = CSR_PCI_READ_4(sc, PCI_OUR_REG_5); our &= PCI_CTL_TIM_VMAIN_AV_MSK; - pci_write_config(sc->msk_dev, PCI_OUR_REG_5, our, 4); - pci_write_config(sc->msk_dev, PCI_CFG_REG_1, 0, 4); + CSR_PCI_WRITE_4(sc, PCI_OUR_REG_5, our); + CSR_PCI_WRITE_4(sc, PCI_CFG_REG_1, 0); /* * Disable status race, workaround for * Yukon EC Ultra & Yukon EX. @@ -1262,7 +1262,7 @@ msk_phy_power(struct msk_softc *sc, int } break; case MSK_PHY_POWERDOWN: - val = pci_read_config(sc->msk_dev, PCI_OUR_REG_1, 4); + val = CSR_PCI_READ_4(sc, PCI_OUR_REG_1); val |= PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD; if (sc->msk_hw_id == CHIP_ID_YUKON_XL && sc->msk_hw_rev > CHIP_REV_YU_XL_A1) { @@ -1270,7 +1270,7 @@ msk_phy_power(struct msk_softc *sc, int if (sc->msk_num_port > 1) val &= ~PCI_Y2_PHY2_COMA; } - pci_write_config(sc->msk_dev, PCI_OUR_REG_1, val, 4); + CSR_PCI_WRITE_4(sc, PCI_OUR_REG_1, val); val = Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS | Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |