Date: Wed, 7 Jun 1995 13:23:44 -0700 (PDT) From: "Rodney W. Grimes" <rgrimes@gndrsh.aac.dev.com> To: terry@cs.weber.edu (Terry Lambert) Cc: davidg@Root.COM, maddox@CS.Berkeley.EDU, sysseh@devetir.qld.gov.au, bugs@FreeBSD.org Subject: Re: 2.0.5-A: Very disheartening? Message-ID: <199506072023.NAA03182@gndrsh.aac.dev.com> In-Reply-To: <9506071953.AA08491@cs.weber.edu> from "Terry Lambert" at Jun 7, 95 01:53:02 pm
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> > > I do know for certain that any write to memory of data that is in the > > Pentium I cache will cause it to invalidate the I cache line. > > It will, according to "The Undocumented PC". I take it that you mean it will invalidate the prefetch buffer, I already said I knew it would invalidate the I cache. Looks like you got your reply to the wrong part of context. > The Pentium is the only Intel processer for which this is true. That is my understanding for pre fetch buffer invalidation. Need to go get the P6 specs and see what they have done there... -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Custom computers for FreeBSD
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