Date: Thu, 19 Apr 2001 16:45:31 -0500 From: Mike Meyer <mwm@mired.org> To: "Charles Burns" <burnscharlesn@hotmail.com> Cc: questions@freebsd.org Subject: Re: the AMD factor in FreeBSD Message-ID: <15071.23675.966064.330382@guru.mired.org> In-Reply-To: <100472025@toto.iv>
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Charles Burns <burnscharlesn@hotmail.com> types: > You are quite right though, modern x86 CPUs translate everything to RISC > micro-ops befor processing them. RISC is pretty much vertical microcode. WISC - which didn't make quite the same splash - is pretty much horizontal microcode. People wanting to build fast CISC computers have done so by microcoding them for a long time, usually using vertical microcode. The 370 line was that way, as well the high end of the PDP-11 line was that way. Seymour Cray didn't have to implement a CISC instruction set, so the Cray I instruction set is very RISC-like, with the exception of the instructions for dealing with the array processor hanging off the back. The truly cool machines had a writable control store. The PDP-11 kit sold by Heathkit included that as an option. BBN had the ultimate Unix version, though - they included a C compiler and WCS linker so you could write new instructions in C, so your function calls turned into single instructions. My favorite microcode oddity is the IBM PC card IBM sold that used a 68K chip with custom microcode to interpret 370 machine instructions so you could run MVS software on your x86 PC. Ok, enough reminiscing for one day. <mike -- Mike Meyer <mwm@mired.org> http://www.mired.org/home/mwm/ Independent WWW/Perforce/FreeBSD/Unix consultant, email for more information. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
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