From owner-freebsd-alpha Thu Jul 20 12:11:24 2000 Delivered-To: freebsd-alpha@freebsd.org Received: from duke.cs.duke.edu (duke.cs.duke.edu [152.3.140.1]) by hub.freebsd.org (Postfix) with ESMTP id 9B48237B5E3 for ; Thu, 20 Jul 2000 12:11:18 -0700 (PDT) (envelope-from gallatin@cs.duke.edu) Received: from gale.cs.duke.edu (gale.cs.duke.edu [152.3.145.6]) by duke.cs.duke.edu (8.9.3/8.9.3) with ESMTP id PAA17490; Thu, 20 Jul 2000 15:11:16 -0400 (EDT) From: Andrew Gallatin Received: (gallatin@localhost) by gale.cs.duke.edu (8.8.4/8.6.9) id PAA15726; Thu, 20 Jul 2000 15:11:16 -0400 (EDT) Date: Thu, 20 Jul 2000 15:11:16 -0400 (EDT) Message-Id: <200007201911.PAA15726@gale.cs.duke.edu> To: mjacob@feral.com Subject: Re: fxp0 hangs on a PC164 using STABLE Cc: freebsd-alpha@freebsd.org Sender: owner-freebsd-alpha@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org On the last, (putting in a memory barrier) -- I object because its implicit in the atomic instructions & would be totally superfulous. An addition to the comment to point this out might be appropriate though.. WRT memory barriers on i86 -- I though that writes to device memory space were uncachable & flushed the write buffers unless an mtrr was set up for the region & it was made cacheable. I defer to the i86 experts.. As for flushing writes to main memory for better device communication, I have no clue.. Drew To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-alpha" in the body of the message