Date: Fri, 20 Sep 2002 20:30:17 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 17819 for review Message-ID: <200209210330.g8L3UH9C007514@freefall.freebsd.org>
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http://people.freebsd.org/~peter/p4db/chv.cgi?CH=17819 Change 17819 by peter@peter_daintree on 2002/09/20 20:30:00 unifdef -U I386_CPU Affected files ... .. //depot/projects/hammer/sys/x86_64/include/atomic.h#2 edit .. //depot/projects/hammer/sys/x86_64/include/cpu.h#3 edit .. //depot/projects/hammer/sys/x86_64/isa/npx.c#7 edit .. //depot/projects/hammer/sys/x86_64/x86_64/machdep.c#8 edit .. //depot/projects/hammer/sys/x86_64/x86_64/pmap.c#2 edit .. //depot/projects/hammer/sys/x86_64/x86_64/trap.c#5 edit Differences ... ==== //depot/projects/hammer/sys/x86_64/include/atomic.h#2 (text+ko) ==== @@ -117,34 +117,6 @@ #if defined(__GNUC__) -#if defined(I386_CPU) - -static __inline int -atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) -{ - int res = exp; - - __asm __volatile( - " pushfl ; " - " cli ; " - " cmpl %0,%2 ; " - " jne 1f ; " - " movl %1,%2 ; " - "1: " - " sete %%al; " - " movzbl %%al,%0 ; " - " popfl ; " - "# atomic_cmpset_int" - : "+a" (res) /* 0 (result) */ - : "r" (src), /* 1 */ - "m" (*(dst)) /* 2 */ - : "memory"); - - return (res); -} - -#else /* defined(I386_CPU) */ - static __inline int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) { @@ -165,36 +137,10 @@ return (res); } -#endif /* defined(I386_CPU) */ - #endif /* defined(__GNUC__) */ #if defined(__GNUC__) -#if defined(I386_CPU) - -/* - * We assume that a = b will do atomic loads and stores. - * - * XXX: This is _NOT_ safe on a P6 or higher because it does not guarantee - * memory ordering. These should only be used on a 386. - */ -#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ -static __inline u_##TYPE \ -atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ -{ \ - return (*p); \ -} \ - \ -static __inline void \ -atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ -{ \ - *p = v; \ - __asm __volatile("" : : : "memory"); \ -} - -#else /* !defined(I386_CPU) */ - #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ static __inline u_##TYPE \ atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ @@ -221,8 +167,6 @@ : : "memory"); \ } -#endif /* defined(I386_CPU) */ - #else /* !defined(__GNUC__) */ extern int atomic_cmpset_int(volatile u_int *, u_int, u_int); ==== //depot/projects/hammer/sys/x86_64/include/cpu.h#3 (text+ko) ==== @@ -99,14 +99,7 @@ static __inline u_int64_t get_cyclecount(void) { -#if defined(I386_CPU) || defined(I486_CPU) - struct timespec tv; - if (!tsc_present) { - nanotime(&tv); - return (tv.tv_sec * (u_int64_t)1000000000 + tv.tv_nsec); - } -#endif return (rdtsc()); } ==== //depot/projects/hammer/sys/x86_64/isa/npx.c#7 (text+ko) ==== @@ -35,7 +35,6 @@ * $FreeBSD: src/sys/i386/isa/npx.c,v 1.131 2002/09/16 19:25:59 mini Exp $ */ -#include "opt_cpu.h" #include "opt_debug_npx.h" #include "opt_isa.h" #include "opt_npx.h" @@ -127,10 +126,6 @@ static int npx_probe(device_t dev); static void fpusave(union savefpu *); static void fpurstor(union savefpu *); -#ifdef I586_CPU_XXX -static long timezero(const char *funcname, - void (*func)(void *buf, size_t len)); -#endif /* I586_CPU */ int hw_float = 1; SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, @@ -560,7 +555,6 @@ * appear to have been triggered by the current (npx) user * instruction even when that instruction is a no-wait * instruction that should not trigger an error (e.g., - * fnclex). On at least one 486 system all of the no-wait * instructions are broken the same as frstor, so our * treatment does not amplify the breakage. On at least * one 386/Cyrix 387 system, fnclex works correctly while @@ -705,36 +699,6 @@ frstor(addr); } -#ifdef I586_CPU_XXX -static long -timezero(funcname, func) - const char *funcname; - void (*func)(void *buf, size_t len); - -{ - void *buf; -#define BUFSIZE 1048576 - long usec; - struct timeval finish, start; - - buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT); - if (buf == NULL) - return (BUFSIZE); - microtime(&start); - (*func)(buf, BUFSIZE); - microtime(&finish); - usec = 1000000 * (finish.tv_sec - start.tv_sec) + - finish.tv_usec - start.tv_usec; - if (usec <= 0) - usec = 1; - if (bootverbose) - printf("%s bandwidth = %u kBps\n", funcname, - (u_int32_t)(((BUFSIZE >> 10) * 1000000) / usec)); - free(buf, M_TEMP); - return (usec); -} -#endif /* I586_CPU */ - static device_method_t npx_methods[] = { /* Device interface */ DEVMETHOD(device_identify, npx_identify), ==== //depot/projects/hammer/sys/x86_64/x86_64/machdep.c#8 (text+ko) ==== @@ -620,9 +620,7 @@ cr0 |= CR0_NE; /* Done by npxinit() */ #endif cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ -#ifndef I386_CPU cr0 |= CR0_WP | CR0_AM; -#endif load_cr0(cr0); load_gs(_udatasel); } ==== //depot/projects/hammer/sys/x86_64/x86_64/pmap.c#2 (text+ko) ==== @@ -578,34 +578,6 @@ return 0; } -#ifdef I386_CPU -/* - * i386 only has "invalidate everything" and no SMP to worry about. - */ -PMAP_INLINE void -pmap_invalidate_page(pmap_t pmap, vm_offset_t va) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} - -PMAP_INLINE void -pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} - -PMAP_INLINE void -pmap_invalidate_all(pmap_t pmap) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} -#else /* !I386_CPU */ #ifdef SMP /* * For SMP, these functions have to use the IPI mechanism for coherence. @@ -725,7 +697,6 @@ invltlb(); } #endif /* !SMP */ -#endif /* !I386_CPU */ /* * Return an address which is the base of the Virtual mapping of @@ -1177,11 +1148,7 @@ pmap->pm_pdir = (pd_entry_t *)kmem_alloc_pageable(kernel_map, PAGE_SIZE); pmap_kenter((vm_offset_t)pmap->pm_pdir, (vm_offset_t)IdlePTD); -#ifndef I386_CPU invlpg((vm_offset_t)pmap->pm_pdir); -#else - invltlb(); -#endif pmap->pm_ptphint = NULL; pmap->pm_active = 0; TAILQ_INIT(&pmap->pm_pvlist); @@ -2279,11 +2246,7 @@ va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); pmap_kenter(va, pa); -#ifndef I386_CPU invlpg(va); -#else - invltlb(); -#endif return ((void *)crashdumpmap); } @@ -2742,14 +2705,10 @@ if (*CMAP2) panic("pmap_zero_page: CMAP2 busy"); *CMAP2 = PG_V | PG_RW | phys | PG_A | PG_M; -#ifdef I386_CPU - invltlb(); -#else #ifdef SMP curthread->td_switchin = pmap_zpi_switchin2; #endif invlpg((u_int)CADDR2); -#endif #if defined(I686_CPU) if (cpu_class == CPUCLASS_686) i686_pagezero(CADDR2); @@ -2777,14 +2736,10 @@ if (*CMAP2) panic("pmap_zero_page: CMAP2 busy"); *CMAP2 = PG_V | PG_RW | phys | PG_A | PG_M; -#ifdef I386_CPU - invltlb(); -#else #ifdef SMP curthread->td_switchin = pmap_zpi_switchin2; #endif invlpg((u_int)CADDR2); -#endif #if defined(I686_CPU) if (cpu_class == CPUCLASS_686 && off == 0 && size == PAGE_SIZE) i686_pagezero(CADDR2); @@ -2812,14 +2767,10 @@ if (*CMAP3) panic("pmap_zero_page: CMAP3 busy"); *CMAP3 = PG_V | PG_RW | phys | PG_A | PG_M; -#ifdef I386_CPU - invltlb(); -#else #ifdef SMP curthread->td_switchin = pmap_zpi_switchin3; #endif invlpg((u_int)CADDR3); -#endif #if defined(I686_CPU) if (cpu_class == CPUCLASS_686) i686_pagezero(CADDR3); @@ -2848,15 +2799,11 @@ panic("pmap_copy_page: CMAP2 busy"); *CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; *CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; -#ifdef I386_CPU - invltlb(); -#else #ifdef SMP curthread->td_switchin = pmap_zpi_switchin12; #endif invlpg((u_int)CADDR1); invlpg((u_int)CADDR2); -#endif bcopy(CADDR1, CADDR2, PAGE_SIZE); #ifdef SMP curthread->td_switchin = NULL; ==== //depot/projects/hammer/sys/x86_64/x86_64/trap.c#5 (text+ko) ==== @@ -100,9 +100,6 @@ #include <sys/sysctl.h> extern void trap(struct trapframe frame); -#ifdef I386_CPU -extern int trapwrite(unsigned addr); -#endif extern void syscall(struct trapframe frame); static int trap_pfault(struct trapframe *, int, vm_offset_t); @@ -817,53 +814,6 @@ panic("double fault"); } -#ifdef I386_CPU -/* - * Compensate for 386 brain damage (missing URKR). - * This is a little simpler than the pagefault handler in trap() because - * it the page tables have already been faulted in and high addresses - * are thrown out early for other reasons. - */ -int trapwrite(addr) - unsigned addr; -{ - struct thread *td; - struct proc *p; - vm_offset_t va; - struct vmspace *vm; - int rv; - - va = trunc_page((vm_offset_t)addr); - /* - * XXX - MAX is END. Changed > to >= for temp. fix. - */ - if (va >= VM_MAXUSER_ADDRESS) - return (1); - - td = curthread; - p = td->td_proc; - vm = p->p_vmspace; - - PROC_LOCK(p); - ++p->p_lock; - PROC_UNLOCK(p); - - /* - * fault the data page - */ - rv = vm_fault(&vm->vm_map, va, VM_PROT_WRITE, VM_FAULT_DIRTY); - - PROC_LOCK(p); - --p->p_lock; - PROC_UNLOCK(p); - - if (rv != KERN_SUCCESS) - return 1; - - return (0); -} -#endif - /* * syscall - system call request C handler * To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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