Date: Tue, 22 Apr 2014 13:02:13 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r264763 - in stable/8/sys/dev: puc uart Message-ID: <201404221302.s3MD2Dc0031765@svn.freebsd.org>
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Author: marius Date: Tue Apr 22 13:02:12 2014 New Revision: 264763 URL: http://svnweb.freebsd.org/changeset/base/264763 Log: MFC: r229379 Add support for Intel EG20T serial ports MFC: r248340 Add support for Exar XR17V358 8-port serial device to puc(4) MFC: r248472 Correct the definition for Exar XR17V258IV: we must use a config_function to specify the offset into the PCI memory spare at which each serial port will find its registers. This was already done for other Exar PCI serial devices; it was accidentally omitted for this specific device. MFC: r251713 Fix whitespace and normalize some entries. MFC: r251715 All of Oxford/PLX OX16PCI954, OXm16PCI954 and OXu16PCI954 share the exact same (subsystem) device and vendor IDs. However, the reference design for the OXu16PCI954 uses a 14.7456 MHz clock (as does the EXSYS EX-41098-2 equipped with these), while at least the OX16PCI954 defaults to a 1.8432 MHz one. According to the datasheets of these chips, the only difference in PCI configuration space is that OXu16PCI954 have a revision ID of 1 while the other two are at 0. So employ the latter for determining the default clock rates of this family. MFC: r264257, r264327, r264514 Distinguish between the different variants and configurations of Sunix {MIO,SER}5xxxx chips instead of treating all of them as PUC_PORT_2S. Among others, this fixes the hang seen when trying to probe the none- existent second UART on an actually 1-port chip. Obtained from: NetBSD (BAR layouts) Sponsored by: Bally Wulff Games & Entertainment GmbH Modified: stable/8/sys/dev/puc/pucdata.c stable/8/sys/dev/uart/uart_bus_pci.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/dev/ (props changed) stable/8/sys/dev/puc/ (props changed) stable/8/sys/dev/uart/ (props changed) Modified: stable/8/sys/dev/puc/pucdata.c ============================================================================== --- stable/8/sys/dev/puc/pucdata.c Tue Apr 22 13:02:06 2014 (r264762) +++ stable/8/sys/dev/puc/pucdata.c Tue Apr 22 13:02:12 2014 (r264763) @@ -50,12 +50,15 @@ __FBSDID("$FreeBSD$"); static puc_config_f puc_config_amc; static puc_config_f puc_config_diva; static puc_config_f puc_config_exar; +static puc_config_f puc_config_exar_pcie; static puc_config_f puc_config_icbook; static puc_config_f puc_config_moxa; +static puc_config_f puc_config_oxford_pci954; static puc_config_f puc_config_oxford_pcie; static puc_config_f puc_config_quatech; static puc_config_f puc_config_syba; static puc_config_f puc_config_siig; +static puc_config_f puc_config_sunix; static puc_config_f puc_config_timedia; static puc_config_f puc_config_titan; @@ -511,14 +514,14 @@ const struct puc_cfg puc_pci_devices[] = "Moxa Technologies, Smartio CP-102E/PCIe", DEFAULT_RCLK * 8, PUC_PORT_2S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x1393, 0x1025, 0xffff, 0, "Moxa Technologies, Smartio CP-102EL/PCIe", DEFAULT_RCLK * 8, PUC_PORT_2S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x1393, 0x1040, 0xffff, 0, @@ -549,7 +552,7 @@ const struct puc_cfg puc_pci_devices[] = "Moxa Technologies, Smartio CP-104EL-A/PCIe", DEFAULT_RCLK * 8, PUC_PORT_4S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x1393, 0x1120, 0xffff, 0, @@ -568,14 +571,14 @@ const struct puc_cfg puc_pci_devices[] = "Moxa Technologies, Smartio CP-114EL/PCIe", DEFAULT_RCLK * 8, PUC_PORT_4S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x1393, 0x1182, 0xffff, 0, "Moxa Technologies, Smartio CP-118EL-A/PCIe", DEFAULT_RCLK * 8, PUC_PORT_8S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x1393, 0x1680, 0xffff, 0, @@ -600,7 +603,7 @@ const struct puc_cfg puc_pci_devices[] = "Moxa Technologies, Smartio CP-168EL-A/PCIe", DEFAULT_RCLK * 8, PUC_PORT_8S, 0x14, 0, -1, - .config_function = puc_config_moxa + .config_function = puc_config_moxa }, { 0x13a8, 0x0152, 0xffff, 0, @@ -628,6 +631,15 @@ const struct puc_cfg puc_pci_devices[] = "Exar XR17V258IV", DEFAULT_RCLK * 8, PUC_PORT_8S, 0x10, 0, -1, + .config_function = puc_config_exar + }, + + /* The XR17V358 uses the 125MHz PCIe clock as its reference clock. */ + { 0x13a8, 0x0358, 0xffff, 0, + "Exar XR17V358", + 125000000, + PUC_PORT_8S, 0x10, 0, -1, + .config_function = puc_config_exar_pcie }, { 0x13fe, 0x1600, 0x1602, 0x0002, @@ -701,10 +713,10 @@ const struct puc_cfg puc_pci_devices[] = * I/O Flex PCI I/O Card Model-223 with 4 serial and 1 parallel ports. */ { - 0x1415, 0x9501, 0x10fc ,0xc070, - "I-O DATA RSA-PCI2/R", - DEFAULT_RCLK * 8, - PUC_PORT_2S, 0x10, 0, 8, + 0x1415, 0x9501, 0x10fc, 0xc070, + "I-O DATA RSA-PCI2/R", + DEFAULT_RCLK * 8, + PUC_PORT_2S, 0x10, 0, 8, }, { 0x1415, 0x9501, 0x131f, 0x2050, @@ -733,8 +745,9 @@ const struct puc_cfg puc_pci_devices[] = { 0x1415, 0x9501, 0xffff, 0, "Oxford Semiconductor OX16PCI954 UARTs", - DEFAULT_RCLK, + 0, PUC_PORT_4S, 0x10, 0, 8, + .config_function = puc_config_oxford_pci954 }, { 0x1415, 0x950a, 0x131f, 0x2030, @@ -820,7 +833,7 @@ const struct puc_cfg puc_pci_devices[] = * * Lindy 51189 (4 port) * <URL:http://www.lindy.com>; <URL:http://tinyurl.com/lindy-51189>; - * + * * StarTech.com PEX4S952 (4 port) and PEX8S952 (8 port) * <URL:http://www.startech.com>; */ @@ -974,16 +987,50 @@ const struct puc_cfg puc_pci_devices[] = .config_function = puc_config_syba }, - { 0x1fd4, 0x1999, 0xffff, 0, - "Sunix SER5437A", + { 0x1fd4, 0x1999, 0x1fd4, 0x0002, + "Sunix SER5xxxx 2-port serial", DEFAULT_RCLK * 8, PUC_PORT_2S, 0x10, 0, 8, }, - { 0x5372, 0x6873, 0xffff, 0, - "Sun 1040 PCI Quad Serial", - DEFAULT_RCLK, - PUC_PORT_4S, 0x10, 4, 0, + { 0x1fd4, 0x1999, 0x1fd4, 0x0004, + "Sunix SER5xxxx 4-port serial", + DEFAULT_RCLK * 8, + PUC_PORT_4S, 0x10, 0, 8, + }, + + { 0x1fd4, 0x1999, 0x1fd4, 0x0008, + "Sunix SER5xxxx 8-port serial", + DEFAULT_RCLK * 8, + PUC_PORT_8S, -1, -1, -1, + .config_function = puc_config_sunix + }, + + { 0x1fd4, 0x1999, 0x1fd4, 0x0101, + "Sunix MIO5xxxx 1-port serial and 1284 Printer port", + DEFAULT_RCLK * 8, + PUC_PORT_1S1P, -1, -1, -1, + .config_function = puc_config_sunix + }, + + { 0x1fd4, 0x1999, 0x1fd4, 0x0102, + "Sunix MIO5xxxx 2-port serial and 1284 Printer port", + DEFAULT_RCLK * 8, + PUC_PORT_2S1P, -1, -1, -1, + .config_function = puc_config_sunix + }, + + { 0x1fd4, 0x1999, 0x1fd4, 0x0104, + "Sunix MIO5xxxx 4-port serial and 1284 Printer port", + DEFAULT_RCLK * 8, + PUC_PORT_4S1P, -1, -1, -1, + .config_function = puc_config_sunix + }, + + { 0x5372, 0x6873, 0xffff, 0, + "Sun 1040 PCI Quad Serial", + DEFAULT_RCLK, + PUC_PORT_4S, 0x10, 4, 0, }, { 0x6666, 0x0001, 0xffff, 0, @@ -1005,14 +1052,14 @@ const struct puc_cfg puc_pci_devices[] = }, { 0x9710, 0x9815, 0xffff, 0, - "NetMos NM9815 Dual 1284 Printer port", + "NetMos NM9815 Dual 1284 Printer port", 0, PUC_PORT_2P, 0x10, 8, 0, - }, + }, /* - * This is more specific than the generic NM9835 entry that follows, and - * is placed here to _prevent_ puc from claiming this single port card. + * This is more specific than the generic NM9835 entry, and is placed + * here to _prevent_ puc(4) from claiming this single port card. * * uart(4) will claim this device. */ @@ -1186,6 +1233,17 @@ puc_config_exar(struct puc_softc *sc, en } static int +puc_config_exar_pcie(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port, + intptr_t *res) +{ + if (cmd == PUC_CFG_GET_OFS) { + *res = port * 0x400; + return (0); + } + return (ENXIO); +} + +static int puc_config_icbook(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port, intptr_t *res) { @@ -1423,19 +1481,19 @@ puc_config_timedia(struct puc_softc *sc, { static const uint16_t dual[] = { 0x0002, 0x4036, 0x4037, 0x4038, 0x4078, 0x4079, 0x4085, - 0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079, - 0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079, + 0x4088, 0x4089, 0x5037, 0x5078, 0x5079, 0x5085, 0x6079, + 0x7079, 0x8079, 0x8137, 0x8138, 0x8237, 0x8238, 0x9079, 0x9137, 0x9138, 0x9237, 0x9238, 0xA079, 0xB079, 0xC079, 0xD079, 0 }; static const uint16_t quad[] = { - 0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157, - 0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159, + 0x4055, 0x4056, 0x4095, 0x4096, 0x5056, 0x8156, 0x8157, + 0x8256, 0x8257, 0x9056, 0x9156, 0x9157, 0x9158, 0x9159, 0x9256, 0x9257, 0xA056, 0xA157, 0xA158, 0xA159, 0xB056, 0xB157, 0 }; static const uint16_t octa[] = { - 0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166, + 0x4065, 0x4066, 0x5065, 0x5066, 0x8166, 0x9066, 0x9166, 0x9167, 0x9168, 0xA066, 0xA167, 0xA168, 0 }; static const struct { @@ -1495,6 +1553,28 @@ puc_config_timedia(struct puc_softc *sc, } static int +puc_config_oxford_pci954(struct puc_softc *sc, enum puc_cfg_cmd cmd, + int port __unused, intptr_t *res) +{ + + switch (cmd) { + case PUC_CFG_GET_CLOCK: + /* + * OXu16PCI954 use a 14.7456 MHz clock by default while + * OX16PCI954 and OXm16PCI954 employ a 1.8432 MHz one. + */ + if (pci_get_revid(sc->sc_dev) == 1) + *res = DEFAULT_RCLK * 8; + else + *res = DEFAULT_RCLK; + return (0); + default: + break; + } + return (ENXIO); +} + +static int puc_config_oxford_pcie(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port, intptr_t *res) { @@ -1568,6 +1648,31 @@ puc_config_oxford_pcie(struct puc_softc } static int +puc_config_sunix(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port, + intptr_t *res) +{ + int error; + + switch (cmd) { + case PUC_CFG_GET_OFS: + error = puc_config(sc, PUC_CFG_GET_TYPE, port, res); + if (error != 0) + return (error); + *res = (*res == PUC_TYPE_SERIAL) ? (port & 3) * 8 : 0; + return (0); + case PUC_CFG_GET_RID: + error = puc_config(sc, PUC_CFG_GET_TYPE, port, res); + if (error != 0) + return (error); + *res = (*res == PUC_TYPE_SERIAL && port <= 3) ? 0x10 : 0x14; + return (0); + default: + break; + } + return (ENXIO); +} + +static int puc_config_titan(struct puc_softc *sc, enum puc_cfg_cmd cmd, int port, intptr_t *res) { Modified: stable/8/sys/dev/uart/uart_bus_pci.c ============================================================================== --- stable/8/sys/dev/uart/uart_bus_pci.c Tue Apr 22 13:02:06 2014 (r264762) +++ stable/8/sys/dev/uart/uart_bus_pci.c Tue Apr 22 13:02:12 2014 (r264763) @@ -113,11 +113,17 @@ static const struct pci_id pci_ns8250_id 0x10, 16384000 }, { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10}, { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 }, +{ 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10, + 8 * DEFAULT_RCLK }, { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 }, { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 0x10 }, { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 }, { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller", 0x10 }, +{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 }, +{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 }, +{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 }, +{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 }, { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 }, { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 }, { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
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