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Date:      Sun, 11 Jan 2015 10:26:50 +0000 (UTC)
From:      Andrew Turner <andrew@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r276963 - head/sys/arm/arm
Message-ID:  <201501111026.t0BAQo8a033714@svn.freebsd.org>
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Author: andrew
Date: Sun Jan 11 10:26:49 2015
New Revision: 276963
URL: https://svnweb.freebsd.org/changeset/base/276963

Log:
  Rework the GIC driver to ease the import of the arm_intrng branch. The
  common code has been pulled out to static functions.

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==============================================================================
--- head/sys/arm/arm/gic.c	Sun Jan 11 09:25:01 2015	(r276962)
+++ head/sys/arm/arm/gic.c	Sun Jan 11 10:26:49 2015	(r276963)
@@ -155,10 +155,10 @@ arm_gic_probe(device_t dev)
 	return (BUS_PROBE_DEFAULT);
 }
 
-void
-gic_init_secondary(void)
+static void
+arm_gic_init_secondary(device_t dev)
 {
-	struct arm_gic_softc *sc = arm_gic_sc;
+	struct arm_gic_softc *sc = device_get_softc(dev);
 	int i;
 
 	for (i = 0; i < sc->nirqs; i += 4)
@@ -311,21 +311,9 @@ arm_gic_attach(device_t dev)
 	return (0);
 }
 
-static void
-gic_post_filter(void *arg)
-{
-	struct arm_gic_softc *sc = arm_gic_sc;
-	uintptr_t irq = (uintptr_t) arg;
-
-	if (irq > GIC_LAST_IPI)
-		arm_irq_memory_barrier(irq);
-	gic_c_write_4(sc, GICC_EOIR, irq);
-}
-
-int
-arm_get_next_irq(int last_irq)
+static int
+arm_gic_next_irq(struct arm_gic_softc *sc, int last_irq)
 {
-	struct arm_gic_softc *sc = arm_gic_sc;
 	uint32_t active_irq;
 
 	active_irq = gic_c_read_4(sc, GICC_IAR);
@@ -348,31 +336,11 @@ arm_get_next_irq(int last_irq)
 	return active_irq;
 }
 
-void
-arm_mask_irq(uintptr_t nb)
-{
-	struct arm_gic_softc *sc = arm_gic_sc;
-
-	gic_d_write_4(sc, GICD_ICENABLER(nb >> 5), (1UL << (nb & 0x1F)));
-	gic_c_write_4(sc, GICC_EOIR, nb);
-}
-
-void
-arm_unmask_irq(uintptr_t nb)
-{
-	struct arm_gic_softc *sc = arm_gic_sc;
-
-	if (nb > GIC_LAST_IPI)
-		arm_irq_memory_barrier(nb);
-	gic_d_write_4(sc, GICD_ISENABLER(nb >> 5), (1UL << (nb & 0x1F)));
-}
-
 static int
-gic_config_irq(int irq, enum intr_trigger trig,
+arm_gic_config(device_t dev, int irq, enum intr_trigger trig,
     enum intr_polarity pol)
 {
-	struct arm_gic_softc *sc = arm_gic_sc;
-	device_t dev = sc->gic_dev;
+	struct arm_gic_softc *sc = device_get_softc(dev);
 	uint32_t reg;
 	uint32_t mask;
 
@@ -421,11 +389,32 @@ invalid_args:
 	return (EINVAL);
 }
 
+
+static void
+arm_gic_mask(device_t dev, int irq)
+{
+	struct arm_gic_softc *sc = device_get_softc(dev);
+
+	gic_d_write_4(sc, GICD_ICENABLER(irq >> 5), (1UL << (irq & 0x1F)));
+	gic_c_write_4(sc, GICC_EOIR, irq);
+}
+
+static void
+arm_gic_unmask(device_t dev, int irq)
+{
+	struct arm_gic_softc *sc = device_get_softc(dev);
+
+	if (irq > GIC_LAST_IPI)
+		arm_irq_memory_barrier(irq);
+
+	gic_d_write_4(sc, GICD_ISENABLER(irq >> 5), (1UL << (irq & 0x1F)));
+}
+
 #ifdef SMP
-void
-pic_ipi_send(cpuset_t cpus, u_int ipi)
+static void
+arm_gic_ipi_send(device_t dev, cpuset_t cpus, u_int ipi)
 {
-	struct arm_gic_softc *sc = arm_gic_sc;
+	struct arm_gic_softc *sc = device_get_softc(dev);
 	uint32_t val = 0, i;
 
 	for (i = 0; i < MAXCPU; i++)
@@ -435,8 +424,8 @@ pic_ipi_send(cpuset_t cpus, u_int ipi)
 	gic_d_write_4(sc, GICD_SGIR(0), val | ipi);
 }
 
-int
-pic_ipi_read(int i)
+static int
+arm_gic_ipi_read(device_t dev, int i)
 {
 
 	if (i != -1) {
@@ -452,9 +441,79 @@ pic_ipi_read(int i)
 	return (0x3ff);
 }
 
+static void
+arm_gic_ipi_clear(device_t dev, int ipi)
+{
+	/* no-op */
+}
+#endif
+
+static void
+gic_post_filter(void *arg)
+{
+	struct arm_gic_softc *sc = arm_gic_sc;
+	uintptr_t irq = (uintptr_t) arg;
+
+	if (irq > GIC_LAST_IPI)
+		arm_irq_memory_barrier(irq);
+	gic_c_write_4(sc, GICC_EOIR, irq);
+}
+
+static int
+gic_config_irq(int irq, enum intr_trigger trig, enum intr_polarity pol)
+{
+
+	return (arm_gic_config(arm_gic_sc->gic_dev, irq, trig, pol));
+}
+
+void
+arm_mask_irq(uintptr_t nb)
+{
+
+	arm_gic_mask(arm_gic_sc->gic_dev, nb);
+}
+
+void
+arm_unmask_irq(uintptr_t nb)
+{
+
+	arm_gic_unmask(arm_gic_sc->gic_dev, nb);
+}
+
+int
+arm_get_next_irq(int last_irq)
+{
+
+	return (arm_gic_next_irq(arm_gic_sc, last_irq));
+}
+
+void
+gic_init_secondary(void)
+{
+
+	arm_gic_init_secondary(arm_gic_sc->gic_dev);
+}
+
+#ifdef SMP
+void
+pic_ipi_send(cpuset_t cpus, u_int ipi)
+{
+
+	arm_gic_ipi_send(arm_gic_sc->gic_dev, cpus, ipi);
+}
+
+int
+pic_ipi_read(int i)
+{
+
+	return (arm_gic_ipi_read(arm_gic_sc->gic_dev, i));
+}
+
 void
 pic_ipi_clear(int ipi)
 {
+
+	arm_gic_ipi_clear(arm_gic_sc->gic_dev, ipi);
 }
 #endif

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