From owner-freebsd-hardware Sat Jun 22 15:22:42 1996 Return-Path: owner-hardware Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id PAA13402 for hardware-outgoing; Sat, 22 Jun 1996 15:22:42 -0700 (PDT) Received: from zen.nash.org (nash.pr.mcs.net [204.95.47.72]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id PAA13397 for ; Sat, 22 Jun 1996 15:22:32 -0700 (PDT) Received: (from alex@localhost) by zen.nash.org (8.7.5/8.6.12) id RAA06668; Sat, 22 Jun 1996 17:21:04 -0500 (CDT) Date: Sat, 22 Jun 1996 17:21:04 -0500 (CDT) Message-Id: <199606222221.RAA06668@zen.nash.org> From: Alex Nash To: michaelv@HeadCandy.com Cc: freebsd-hardware@freebsd.org Subject: Re: Mixing SIMMs of different speeds Reply-to: nash@mcs.com Sender: owner-hardware@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > >I'm wondering if I can mix 60 and 70ns SIMMs. Everyone says don't, > >but they don't say why. I can understand not mixing SIMMs that will > >be accessed simultaneously (like banks 1 and 2), but why shouldn't it > >work when they are separated? My motherboard's manual indicates 70ns > >or faster will work, so why wouldn't a mixture? > > Probably because the people who designed your motherboard designed its > timing parameters with the assumption that all your memory would > display consistent behavior. The question is what behavior is it expecting? If it expects the data to be valid within 70ns, it is consistent. > Another thing is that some motherboards will do interleaved access if > you have matching size SIMMs in all the slots. This is where it > alternates between accessing bank 1 and bank 2 on even/odd memory > accesses. Aren't both banks (1&2) accessed simultaneously for any 32-bit access? When you said all slots, you mean groups of two, right? > This speeds things up because it only has to initialize the > address on the first access of a burst, and can then burst in > consecutive blocks of memory with little setup time. If your SIMMs > have different timing characteristics, you will definitely have to > find a way to let your motherboard know to use only the slowest access > speed, or don't try it at all. As I wrote in the first message, I wouldn't expect a mixture of 60ns in bank 1 and 70ns in bank 2 (and _probably_ vice versa, depending on how the speed is determined) to work. > If it were going to work at all, that would be my suggestion: put the > slower memory first, so if it does some sort of test to see how fast > your memory is, it might use the slower memory for the timings. Note > that this is highly speculative and implementation specific. Only the > people who designed your motherboard can tell you for sure. Good, so I'm not crazy for thinking this might work :) Alex