From owner-freebsd-arm@FreeBSD.ORG Sat Jan 4 21:23:17 2014 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id EF78040D; Sat, 4 Jan 2014 21:23:16 +0000 (UTC) Received: from smtpauth4.wiscmail.wisc.edu (wmauth4.doit.wisc.edu [144.92.197.145]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id B9CBE1254; Sat, 4 Jan 2014 21:23:16 +0000 (UTC) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; CHARSET=US-ASCII Received: from avs-daemon.smtpauth4.wiscmail.wisc.edu by smtpauth4.wiscmail.wisc.edu (Oracle Communications Messaging Server 7u4-27.01(7.0.4.27.0) 64bit (built Aug 30 2012)) id <0MYW00D00BB6PC00@smtpauth4.wiscmail.wisc.edu>; Sat, 04 Jan 2014 15:23:14 -0600 (CST) X-Spam-PmxInfo: Server=avs-4, Version=6.0.3.2322014, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2014.1.4.211218, SenderIP=0.0.0.0 X-Spam-Report: AuthenticatedSender=yes, SenderIP=0.0.0.0 Received: from wanderer.tachypleus.net (pool-72-66-107-173.washdc.fios.verizon.net [72.66.107.173]) by smtpauth4.wiscmail.wisc.edu (Oracle Communications Messaging Server 7u4-27.01(7.0.4.27.0) 64bit (built Aug 30 2012)) with ESMTPSA id <0MYW00DMJBEO4U20@smtpauth4.wiscmail.wisc.edu>; Sat, 04 Jan 2014 15:23:14 -0600 (CST) Message-id: <52C87BC0.2060304@freebsd.org> Date: Sat, 04 Jan 2014 16:23:12 -0500 From: Nathan Whitehorn User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 To: Zbigniew Bodek , "freebsd-arm@freebsd.org" Subject: Re: RFC: ARM related fixes - GIC, cache line size, PCI FDT & AHCI References: <52AF3D06.2000004@semihalf.com> <52AF760A.2030500@freebsd.org> <52B0900B.7020905@freebsd.org> <52B2D0F3.50100@semihalf.com> In-reply-to: <52B2D0F3.50100@semihalf.com> X-Enigmail-Version: 1.6 Cc: br@freebsd.org, Olivier Houchard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Jan 2014 21:23:17 -0000 On 12/19/13 05:56, Zbigniew Bodek wrote: > On 17.12.2013 18:55, Nathan Whitehorn wrote: >> On 12/16/13 15:52, Nathan Whitehorn wrote: >>> On 12/16/13 11:48, Zbigniew Bodek wrote: >>>> Hello Everyone. >>>> >>>> We would like to submit some new patches recently developed by Semihalf. >>>> >>>> You can find them here: >>>> http://people.freebsd.org/~zbb/Semihalf/12.2013/ >>>> >>>> Detailed description is available in the commit logs but in general: >>>> >>>> -- 0001-Resolve-cache-line-size-using-CP15.patch >>>> - use cache line size acquired in runtime >>>> >>>> -- 0002-GIC-polarity-and-level-support.patch >>>> - suport for setting trigger level and polarity in GIC >>>> >>>> -- 0003-Add-PCI-FDT-interrupt-trigger-polarity-parsing.patch >>>> - trigger and polarity parsing for PCI FDT interrupts >>>> >>>> -- 0004-Do-not-attach-to-bridges-in-AHCI-driver.patch >>>> -- 0005-Use-only-mapped-BIOs-on-ARM.patch >>>> - Two patches enabling the AHCI driver on ARM chips >>>> >>>> >>>> We will appreciate if you could post your comments and/or remarks by the >>>> end of this week when we plan to commit the changes. >>>> >>>> Best regards >>>> zbb >>>> _______________________________________________ >>>> freebsd-arm@freebsd.org mailing list >>>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>>> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" >>> Can you hold off on >>> 0003-Add-PCI-FDT-interrupt-trigger-polarity-parsing.patch for the time >>> being? I'm restructuring this code at the moment. >>> -Nathan >>> _______________________________________________ >>> freebsd-arm@freebsd.org mailing list >>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" >> This is done now. I have not updated the ARM code, because I don't know >> how it is supposed to work, but you can take a look at r259513 to >> powerpc/ofw/ofw_pci.c to see how the new stuff works. It relies on some >> device (nexus, for example) implementing OFW_BUS_CONFIG_INTR(), which >> takes an IRQ and a sense code, but that seems to be wrapped up in a lot >> of ARM-specific stuff. >> >> If you like, I can just write a piece of bridge code, but I don't want >> to interfere with in-flight things on your end. > > Hello Nathan. > > We will wait for your refactoring to finish so no worries. We can skip > this patch for now, the more that there were some comments to this one. > > Thanks and best regards > zbb > My restructuring is now done. I suspect ARM may want something like PowerPC's pic_if.m in the future, but the interfaces are now in place (ofw_bus_map_intr(), ofw_bus_config_intr()) to make that transition fairly painless later on. -Nathan