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Date:      Fri, 20 Mar 1998 07:59:02 +1100 (EST)
From:      Andrew Reilly <reilly@zeta.org.au>
To:        hasty@rah.star-gate.com
Cc:        lamaster@george.arc.nasa.gov, freebsd-current@FreeBSD.ORG
Subject:   Re: Stream_d benchmark... Wow, there really are differences in  har dware
Message-ID:  <199803192059.HAA08094@gurney.reilly.home>
In-Reply-To: <199803191010.CAA21492@rah.star-gate.com>

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On 19 Mar, Amancio Hasty wrote:
> Function      Rate (MB/s)   RMS time     Min time     Max time
> Copy:         113.7778       0.1557       0.1406       0.1719
> Scale:        107.7895       0.1565       0.1484       0.1719
> Add:          118.1538       0.2158       0.2031       0.2344
> Triad:        118.1538       0.2213       0.2031       0.2344
>> Soeren Schmidt (sos@FreeBSD.org) wrote:
>> > Function      Rate (MB/s)   RMS time     Min time     Max time
>> > Copy:         117.0286       0.2758       0.2734       0.2812
>> :
>> > Triad:        125.3878       0.3917       0.3828       0.4219
>> > > Box 1 is a SuperMicro P6DNE:
>> > > Function      Rate (MB/s)   RMS time     Min time     Max time
>> > > Copy:          60.7395       0.2704       0.2634       0.2832
>> > > Triad:         71.1647       0.3494       0.3372       0.3565
>> 
>> Typical for Natoma with FP DRAM I would guess.

I have to say that these are all really terrible numbers!  Does anyone
know what the DRAM controller on these motherboards is doing?

Posit:

A Pentium or Pentium pro memory system is 64 bits wide (8 bytes),
clocked at 66MHz, or 15ns/cycle.  EDO dram shouldn't have trouble doing
four cycle bursts as 4-1-1-1, or perhaps 5-1-1-1: say 120ns/cache line
of 32 bytes.  That's 265M/s in my book.  I assume that the benchmark
code for stream is small, sits in the internal cache, and just thrashes
through long vectors, which should result in back-to-back cache reads
(and writes?)  Does anyone know where that factor of two is going? 
Maybe PC's only get EDO to do -2-2-2?

Do any PC chipsets notice sequential address blocks and avoid the
unnecessary row address cycles?  Seemingly not...

-- 
Andrew

"The steady state of disks is full."
				-- Ken Thompson


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