Date: Fri, 25 Nov 2016 19:15:31 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r309164 - in vendor/lldb/dist: include/lldb/Core source/Core source/Plugins/ABI/SysV-mips64 source/Plugins/Process/Linux source/Plugins/Process/Utility source/Plugins/Process/gdb-remote Message-ID: <201611251915.uAPJFVgo076284@repo.freebsd.org>
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Author: dim Date: Fri Nov 25 19:15:31 2016 New Revision: 309164 URL: https://svnweb.freebsd.org/changeset/base/309164 Log: Vendor import of lldb release_39 branch r287912: https://llvm.org/svn/llvm-project/lldb/branches/release_39@287912 Modified: vendor/lldb/dist/include/lldb/Core/ArchSpec.h vendor/lldb/dist/source/Core/ArchSpec.cpp vendor/lldb/dist/source/Core/RegisterValue.cpp vendor/lldb/dist/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h vendor/lldb/dist/source/Plugins/Process/Utility/RegisterInfos_mips.h vendor/lldb/dist/source/Plugins/Process/Utility/RegisterInfos_mips64.h vendor/lldb/dist/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h vendor/lldb/dist/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp vendor/lldb/dist/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp Modified: vendor/lldb/dist/include/lldb/Core/ArchSpec.h ============================================================================== --- vendor/lldb/dist/include/lldb/Core/ArchSpec.h Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/include/lldb/Core/ArchSpec.h Fri Nov 25 19:15:31 2016 (r309164) @@ -382,6 +382,14 @@ public: return m_core >= eCore_arm_generic && m_core < kNumCores; } + //------------------------------------------------------------------ + /// Return a string representing target application ABI. + /// + /// @return A string representing target application ABI. + //------------------------------------------------------------------ + std::string GetTargetABI() const; + + bool TripleVendorWasSpecified() const { @@ -677,6 +685,8 @@ public: m_flags = flags; } + void SetFlags(std::string elf_abi); + protected: bool IsEqualTo (const ArchSpec& rhs, bool exact_match) const; Modified: vendor/lldb/dist/source/Core/ArchSpec.cpp ============================================================================== --- vendor/lldb/dist/source/Core/ArchSpec.cpp Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Core/ArchSpec.cpp Fri Nov 25 19:15:31 2016 (r309164) @@ -519,11 +519,46 @@ ArchSpec::IsMIPS() const return false; } -std::string -ArchSpec::GetClangTargetCPU () -{ - std::string cpu; - const llvm::Triple::ArchType machine = GetMachine(); + +std::string ArchSpec::GetTargetABI() const { + + std::string abi; + + if (IsMIPS()) { + switch (GetFlags() & ArchSpec::eMIPSABI_mask) { + case ArchSpec::eMIPSABI_N64: + abi = "n64"; + return abi; + case ArchSpec::eMIPSABI_N32: + abi = "n32"; + return abi; + case ArchSpec::eMIPSABI_O32: + abi = "o32"; + return abi; + default: + return abi; + } + } + return abi; +} + +void ArchSpec::SetFlags(std::string elf_abi) { + + uint32_t flag = GetFlags(); + if (IsMIPS()) { + if (elf_abi == "n64") + flag |= ArchSpec::eMIPSABI_N64; + else if (elf_abi == "n32") + flag |= ArchSpec::eMIPSABI_N32; + else if (elf_abi == "o32") + flag |= ArchSpec::eMIPSABI_O32; + } + SetFlags(flag); +} + +std::string ArchSpec::GetClangTargetCPU() { + std::string cpu; + const llvm::Triple::ArchType machine = GetMachine(); if (machine == llvm::Triple::mips || machine == llvm::Triple::mipsel || Modified: vendor/lldb/dist/source/Core/RegisterValue.cpp ============================================================================== --- vendor/lldb/dist/source/Core/RegisterValue.cpp Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Core/RegisterValue.cpp Fri Nov 25 19:15:31 2016 (r309164) @@ -652,34 +652,37 @@ RegisterValue::GetAsUInt32 (uint32_t fai uint64_t RegisterValue::GetAsUInt64 (uint64_t fail_value, bool *success_ptr) const { - if (success_ptr) - *success_ptr = true; - switch (m_type) - { - default: break; - case eTypeUInt8: - case eTypeUInt16: - case eTypeUInt32: - case eTypeUInt64: - case eTypeFloat: - case eTypeDouble: - case eTypeLongDouble: return m_scalar.ULongLong(fail_value); - case eTypeBytes: - { - switch (buffer.length) - { - default: break; - case 1: - case 2: - case 4: - case 8: return *(const uint64_t *)buffer.bytes; - } - } - break; - } - if (success_ptr) - *success_ptr = false; - return fail_value; + if (success_ptr) + *success_ptr = true; + switch (m_type) { + default: + break; + case eTypeUInt8: + case eTypeUInt16: + case eTypeUInt32: + case eTypeUInt64: + case eTypeFloat: + case eTypeDouble: + case eTypeLongDouble: + return m_scalar.ULongLong(fail_value); + case eTypeBytes: { + switch (buffer.length) { + default: + break; + case 1: + return *(const uint8_t *)buffer.bytes; + case 2: + return *(const uint16_t *)buffer.bytes; + case 4: + return *(const uint32_t *)buffer.bytes; + case 8: + return *(const uint64_t *)buffer.bytes; + } + } break; + } + if (success_ptr) + *success_ptr = false; + return fail_value; } llvm::APInt Modified: vendor/lldb/dist/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp ============================================================================== --- vendor/lldb/dist/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp Fri Nov 25 19:15:31 2016 (r309164) @@ -565,109 +565,137 @@ ABISysV_mips64::GetReturnValueObjectImpl // Any structure of up to 16 bytes in size is returned in the registers. if (byte_size <= 16) { - DataBufferSP data_sp (new DataBufferHeap(16, 0)); - DataExtractor return_ext (data_sp, - target_byte_order, - target->GetArchitecture().GetAddressByteSize()); + DataBufferSP data_sp(new DataBufferHeap(16, 0)); + DataExtractor return_ext(data_sp, target_byte_order, + target->GetArchitecture().GetAddressByteSize()); RegisterValue r2_value, r3_value, f0_value, f1_value, f2_value; + // Tracks how much bytes of r2 and r3 registers we've consumed so far + uint32_t integer_bytes = 0; - uint32_t integer_bytes = 0; // Tracks how much bytes of r2 and r3 registers we've consumed so far - bool use_fp_regs = 0; // True if return values are in FP return registers. - bool found_non_fp_field = 0; // True if we found any non floating point field in structure. - bool use_r2 = 0; // True if return values are in r2 register. - bool use_r3 = 0; // True if return values are in r3 register. - bool sucess = 0; // True if the result is copied into our data buffer - std::string name; - bool is_complex; - uint32_t count; - const uint32_t num_children = return_compiler_type.GetNumFields (); - - // A structure consisting of one or two FP values (and nothing else) will be - // returned in the two FP return-value registers i.e fp0 and fp2. - if (num_children <= 2) - { - uint64_t field_bit_offset = 0; - - // Check if this structure contains only floating point fields - for (uint32_t idx = 0; idx < num_children; idx++) - { - CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset, nullptr, nullptr); - - if (field_compiler_type.IsFloatingPointType (count, is_complex)) - use_fp_regs = 1; - else - found_non_fp_field = 1; - } - - if (use_fp_regs && !found_non_fp_field) - { - // We have one or two FP-only values in this structure. Get it from f0/f2 registers. - DataExtractor f0_data, f1_data, f2_data; - const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0); - const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0); - const RegisterInfo *f2_info = reg_ctx->GetRegisterInfoByName("f2", 0); - - reg_ctx->ReadRegister (f0_info, f0_value); - reg_ctx->ReadRegister (f2_info, f2_value); - - f0_value.GetData(f0_data); - f2_value.GetData(f2_data); - - for (uint32_t idx = 0; idx < num_children; idx++) - { - CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset, nullptr, nullptr); - const size_t field_byte_width = field_compiler_type.GetByteSize(nullptr); - - DataExtractor *copy_from_extractor = nullptr; - - if (idx == 0) - { - if (field_byte_width == 16) // This case is for long double type. - { - // If structure contains long double type, then it is returned in fp0/fp1 registers. - reg_ctx->ReadRegister (f1_info, f1_value); - f1_value.GetData(f1_data); - - if (target_byte_order == eByteOrderLittle) - { - f0_data.Append(f1_data); - copy_from_extractor = &f0_data; - } - else - { - f1_data.Append(f0_data); - copy_from_extractor = &f1_data; - } - } - else - copy_from_extractor = &f0_data; // This is in f0, copy from register to our result structure - } - else - copy_from_extractor = &f2_data; // This is in f2, copy from register to our result structure - - // Sanity check to avoid crash - if (!copy_from_extractor || field_byte_width > copy_from_extractor->GetByteSize()) - return return_valobj_sp; - - // copy the register contents into our data buffer - copy_from_extractor->CopyByteOrderedData (0, - field_byte_width, - data_sp->GetBytes() + (field_bit_offset/8), - field_byte_width, - target_byte_order); - } - - // The result is in our data buffer. Create a variable object out of it - return_valobj_sp = ValueObjectConstResult::Create (&thread, - return_compiler_type, - ConstString(""), - return_ext); - - return return_valobj_sp; - } - } - + // True if return values are in FP return registers. + bool use_fp_regs = 0; + // True if we found any non floating point field in structure. + bool found_non_fp_field = 0; + // True if return values are in r2 register. + bool use_r2 = 0; + // True if return values are in r3 register. + bool use_r3 = 0; + // True if the result is copied into our data buffer + bool sucess = 0; + std::string name; + bool is_complex; + uint32_t count; + const uint32_t num_children = return_compiler_type.GetNumFields(); + + // A structure consisting of one or two FP values (and nothing else) will + // be returned in the two FP return-value registers i.e fp0 and fp2. + + if (num_children <= 2) + { + uint64_t field_bit_offset = 0; + + // Check if this structure contains only floating point fields + for (uint32_t idx = 0; idx < num_children; idx++) + { + CompilerType field_compiler_type = + return_compiler_type.GetFieldAtIndex(idx, name, &field_bit_offset, + nullptr, nullptr); + + if (field_compiler_type.IsFloatingPointType(count, is_complex)) + use_fp_regs = 1; + else + found_non_fp_field = 1; + } + + if (use_fp_regs && !found_non_fp_field) + { + // We have one or two FP-only values in this structure. Get it from + // f0/f2 registers. + DataExtractor f0_data, f1_data, f2_data; + const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0); + const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0); + const RegisterInfo *f2_info = reg_ctx->GetRegisterInfoByName("f2", 0); + + reg_ctx->ReadRegister(f0_info, f0_value); + reg_ctx->ReadRegister(f2_info, f2_value); + + f0_value.GetData(f0_data); + + + for (uint32_t idx = 0; idx < num_children; idx++) + { + CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(idx, name, + &field_bit_offset, + nullptr, nullptr); + const size_t field_byte_width = field_compiler_type.GetByteSize(nullptr); + + DataExtractor *copy_from_extractor = nullptr; + uint64_t return_value[2]; + offset_t offset = 0; + + if (idx == 0) + { + // This case is for long double type. + if (field_byte_width == 16) + { + + // If structure contains long double type, then it is returned + // in fp0/fp1 registers. + + + + if (target_byte_order == eByteOrderLittle) + { + return_value[0] = f0_data.GetU64(&offset); + reg_ctx->ReadRegister(f1_info, f1_value); + f1_value.GetData(f1_data); + offset = 0; + return_value[1] = f1_data.GetU64(&offset); + } + else + { + return_value[1] = f0_data.GetU64(&offset); + reg_ctx->ReadRegister(f1_info, f1_value); + f1_value.GetData(f1_data); + offset = 0; + return_value[0] = f1_data.GetU64(&offset); + } + + f0_data.SetData(return_value, field_byte_width, + target_byte_order); + } + copy_from_extractor = &f0_data; // This is in f0, copy from + + // register to our result + // structure + } + else + { + f2_value.GetData(f2_data); + // This is in f2, copy from register to our result structure + copy_from_extractor = &f2_data; + } + + // Sanity check to avoid crash + if (!copy_from_extractor || field_byte_width > copy_from_extractor->GetByteSize()) + return return_valobj_sp; + + // copy the register contents into our data buffer + copy_from_extractor->CopyByteOrderedData(0, field_byte_width,data_sp->GetBytes() + (field_bit_offset / 8), + field_byte_width, target_byte_order); + } + + // The result is in our data buffer. Create a variable object out of + // it + return_valobj_sp = ValueObjectConstResult::Create(&thread, return_compiler_type, ConstString(""), + return_ext); + + return return_valobj_sp; + } + } + + // If we reach here, it means this structure either contains more than two fields or // it contains at least one non floating point type. // In that case, all fields are returned in GP return registers. Modified: vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp ============================================================================== --- vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp Fri Nov 25 19:15:31 2016 (r309164) @@ -180,8 +180,8 @@ NativeRegisterContextLinux::DoReadRegist PTRACE_PEEKUSER, m_thread.GetID(), reinterpret_cast<void *>(offset), nullptr, 0, &data); if (error.Success()) - // First cast to an unsigned of the same size to avoid sign extension. - value.SetUInt64(static_cast<unsigned long>(data)); + // First cast to an unsigned of the same size to avoid sign extension. + value.SetUInt(static_cast<unsigned long>(data), size); if (log) log->Printf ("NativeRegisterContextLinux::%s() reg %s: 0x%lx", __FUNCTION__, reg_name, data); Modified: vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp ============================================================================== --- vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp Fri Nov 25 19:15:31 2016 (r309164) @@ -22,6 +22,7 @@ #include "lldb/Host/HostInfo.h" #include "lldb/Host/Host.h" #include "lldb/Core/EmulateInstruction.h" +#include "lldb/Utility/LLDBAssert.h" #include "lldb/lldb-enumerations.h" #include "lldb/lldb-private-enumerations.h" #include "Plugins/Process/Linux/NativeProcessLinux.h" @@ -569,10 +570,14 @@ NativeRegisterContextLinux_mips64::ReadR } const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; + uint8_t byte_size = reg_info->byte_size; if (reg == LLDB_INVALID_REGNUM) { - // This is likely an internal register for lldb use only and should not be directly queried. - error.SetErrorStringWithFormat ("register \"%s\" is an internal-only lldb register, cannot read directly", reg_info->name); + // This is likely an internal register for lldb use only and should not be + // directly queried. + error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb " + "register, cannot read directly", + reg_info->name); return error; } @@ -584,7 +589,8 @@ NativeRegisterContextLinux_mips64::ReadR if (IsMSA(reg) || IsFPR(reg)) { - uint8_t *src; + uint8_t *src = nullptr; + lldbassert(reg_info->byte_offset < sizeof(UserArea)); error = ReadCP1(); @@ -596,29 +602,35 @@ NativeRegisterContextLinux_mips64::ReadR if (IsFPR(reg)) { - assert (reg_info->byte_offset < sizeof(UserArea)); - src = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr)); + if (IsFR0() && (byte_size != 4)) + { + byte_size = 4; + uint8_t ptrace_index; + ptrace_index = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; + src = ReturnFPOffset(ptrace_index, reg_info->byte_offset); + } + else + src = (uint8_t *)&m_fpr + reg_info->byte_offset - sizeof(m_gpr); } else - { - assert (reg_info->byte_offset < sizeof(UserArea)); - src = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr)); - } - switch (reg_info->byte_size) + src = (uint8_t *)&m_msa + reg_info->byte_offset - + (sizeof(m_gpr) + sizeof(m_fpr)); + switch (byte_size) { case 4: - reg_value.SetUInt32(*(uint32_t *)src); - break; + reg_value.SetUInt32(*(uint32_t *)src); + break; case 8: - reg_value.SetUInt64(*(uint64_t *)src); - break; + reg_value.SetUInt64(*(uint64_t *)src); + break; case 16: - reg_value.SetBytes((const void *)src, 16, GetByteOrder()); - break; + reg_value.SetBytes((const void *)src, 16, GetByteOrder()); + break; default: - assert(false && "Unhandled data size."); - error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size); - break; + assert(false && "Unhandled data size."); + error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, + reg_info->byte_size); + break; } } else @@ -649,44 +661,52 @@ NativeRegisterContextLinux_mips64::Write if (IsFPR(reg_index) || IsMSA(reg_index)) { - uint8_t *dst; - uint64_t *src; + uint8_t *dst = nullptr; + uint64_t *src = nullptr; + uint8_t byte_size = reg_info->byte_size; + lldbassert(reg_info->byte_offset < sizeof(UserArea)); // Initialise the FP and MSA buffers by reading all co-processor 1 registers ReadCP1(); if (IsFPR(reg_index)) { - assert (reg_info->byte_offset < sizeof(UserArea)); - dst = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr)); + if (IsFR0() && (byte_size != 4)) + { + byte_size = 4; + uint8_t ptrace_index; + ptrace_index = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; + dst = ReturnFPOffset(ptrace_index, reg_info->byte_offset); + } + else + dst = (uint8_t *)&m_fpr + reg_info->byte_offset - sizeof(m_gpr); } else - { - assert (reg_info->byte_offset < sizeof(UserArea)); - dst = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr)); - } - switch (reg_info->byte_size) + dst = (uint8_t *)&m_msa + reg_info->byte_offset - + (sizeof(m_gpr) + sizeof(m_fpr)); + switch (byte_size) { case 4: - *(uint32_t *)dst = reg_value.GetAsUInt32(); - break; + *(uint32_t *)dst = reg_value.GetAsUInt32(); + break; case 8: - *(uint64_t *)dst = reg_value.GetAsUInt64(); - break; + *(uint64_t *)dst = reg_value.GetAsUInt64(); + break; case 16: - src = (uint64_t *)reg_value.GetBytes(); - *(uint64_t *)dst = *src; - *(uint64_t *)(dst + 8) = *(src + 1); - break; + src = (uint64_t *)reg_value.GetBytes(); + *(uint64_t *)dst = *src; + *(uint64_t *)(dst + 8) = *(src + 1); + break; default: - assert(false && "Unhandled data size."); - error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size); - break; + assert(false && "Unhandled data size."); + error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, + reg_info->byte_size); + break; } error = WriteCP1(); if (!error.Success()) { - error.SetErrorString ("failed to write co-processor 1 register"); + error.SetErrorString("failed to write co-processor 1 register"); return error; } } @@ -797,11 +817,12 @@ NativeRegisterContextLinux_mips64::ReadC { Error error; - uint8_t *src, *dst; + uint8_t *src = nullptr; + uint8_t *dst = nullptr; lldb::ByteOrder byte_order = GetByteOrder(); - uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig); + bool IsBigEndian = (byte_order == lldb::eByteOrderBig); if (IsMSAAvailable()) { @@ -823,22 +844,28 @@ NativeRegisterContextLinux_mips64::ReadC { error = NativeRegisterContextLinux::ReadFPR(); } + return error; +} - // TODO: Add support for FRE - if (IsFR0()) +uint8_t * +NativeRegisterContextLinux_mips64::ReturnFPOffset(uint8_t reg_index, + uint32_t byte_offset) +{ + uint8_t *fp_buffer_ptr = nullptr; + lldb::ByteOrder byte_order = GetByteOrder(); + bool IsBigEndian = (byte_order == lldb::eByteOrderBig); + if (reg_index % 2) { - src = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4); - dst = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4); - for (int i = 0; i < (NUM_REGISTERS / 2); i++) - { - // copy odd single from top of neighbouring even double - *(uint32_t *) dst = *(uint32_t *) src; - src = src + 16; - dst = dst + 16; - } + uint8_t offset_diff = (IsBigEndian) ? 8 : 4; + fp_buffer_ptr = (uint8_t *)&m_fpr + byte_offset + - offset_diff - sizeof(m_gpr); } - - return error; + else + { + fp_buffer_ptr = (uint8_t *)&m_fpr + byte_offset + + 4 * (IsBigEndian) - sizeof(m_gpr); + } + return fp_buffer_ptr; } Error @@ -846,25 +873,12 @@ NativeRegisterContextLinux_mips64::Write { Error error; - uint8_t *src, *dst; + uint8_t *src = nullptr; + uint8_t *dst = nullptr; lldb::ByteOrder byte_order = GetByteOrder(); - uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig); - - // TODO: Add support for FRE - if (IsFR0()) - { - src = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4); - dst = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4); - for (int i = 0; i < (NUM_REGISTERS / 2); i++) - { - // copy odd single to top of neighbouring even double - *(uint32_t *) dst = *(uint32_t *) src; - src = src + 16; - dst = dst + 16; - } - } + bool IsBigEndian = (byte_order == lldb::eByteOrderBig); if (IsMSAAvailable()) { @@ -1374,51 +1388,58 @@ NativeRegisterContextLinux_mips64::NumSu } return num_valid; } -Error -NativeRegisterContextLinux_mips64::DoReadRegisterValue(uint32_t offset, - const char* reg_name, - uint32_t size, - RegisterValue &value) + +Error NativeRegisterContextLinux_mips64::ReadRegisterRaw(uint32_t reg_index, + RegisterValue &value) { - GPR_linux_mips regs; - ::memset(®s, 0, sizeof(GPR_linux_mips)); + const RegisterInfo *const reg_info = GetRegisterInfoAtIndex(reg_index); - // Clear all bits in RegisterValue before writing actual value read from ptrace to avoid garbage value in 32-bit MSB - value.SetBytes((void *)(((unsigned char *)®s) + offset), 8, GetByteOrder()); - Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), NULL, ®s, sizeof regs); - if (error.Success()) - { - lldb_private::ArchSpec arch; - if (m_thread.GetProcess()->GetArchitecture(arch)) - { - void* target_address = ((uint8_t*)®s) + offset + 4 * (arch.GetMachine() == llvm::Triple::mips); - uint32_t target_size; - if ((::strcmp(reg_name, "sr") == 0) || (::strcmp(reg_name, "cause") == 0) || (::strcmp(reg_name, "config5") == 0)) - target_size = 4; - else - target_size = arch.GetFlags() & lldb_private::ArchSpec::eMIPSABI_O32 ? 4 : 8; - value.SetBytes(target_address, target_size, arch.GetByteOrder()); - } - else - error.SetErrorString("failed to get architecture"); - } - return error; + if (!reg_info) + return Error("register %" PRIu32 " not found", reg_index); + + uint32_t offset = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; + + if ((offset == ptrace_sr_mips) || (offset == ptrace_config5_mips)) + return Read_SR_Config(reg_info->byte_offset, reg_info->name, + reg_info->byte_size, value); + + return DoReadRegisterValue(offset, reg_info->name, reg_info->byte_size, + value); } -Error -NativeRegisterContextLinux_mips64::DoWriteRegisterValue(uint32_t offset, - const char* reg_name, - const RegisterValue &value) +Error NativeRegisterContextLinux_mips64::WriteRegisterRaw( + uint32_t reg_index, const RegisterValue &value) +{ + const RegisterInfo *const reg_info = GetRegisterInfoAtIndex(reg_index); + + if (!reg_info) + return Error("register %" PRIu32 " not found", reg_index); + + if (reg_info->invalidate_regs) + lldbassert(false && "reg_info->invalidate_regs is unhandled"); + + uint32_t offset = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; + return DoWriteRegisterValue(offset, reg_info->name, value); +} + +Error NativeRegisterContextLinux_mips64::Read_SR_Config(uint32_t offset, + const char *reg_name, + uint32_t size, + RegisterValue &value) { GPR_linux_mips regs; - Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), NULL, ®s, sizeof regs); + ::memset(®s, 0, sizeof(GPR_linux_mips)); + + Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), + NULL, ®s, sizeof regs); if (error.Success()) { lldb_private::ArchSpec arch; if (m_thread.GetProcess()->GetArchitecture(arch)) { - ::memcpy((void *)(((unsigned char *)(®s)) + offset), value.GetBytes(), arch.GetFlags() & lldb_private::ArchSpec::eMIPSABI_O32 ? 4 : 8); - error = NativeProcessLinux::PtraceWrapper(PTRACE_SETREGS, m_thread.GetID(), NULL, ®s, sizeof regs); + void *target_address = ((uint8_t *)®s) + offset + + 4 * (arch.GetMachine() == llvm::Triple::mips); + value.SetUInt(*(uint32_t *)target_address, size); } else error.SetErrorString("failed to get architecture"); Modified: vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h ============================================================================== --- vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h Fri Nov 25 19:15:31 2016 (r309164) @@ -63,6 +63,9 @@ namespace process_linux { Error IsWatchpointHit (uint32_t wp_index, bool &is_hit) override; + uint8_t *ReturnFPOffset(uint8_t reg_index, uint32_t byte_offset); + + Error GetWatchpointHitIndex(uint32_t &wp_index, lldb::addr_t trap_addr) override; @@ -93,21 +96,22 @@ namespace process_linux { IsMSAAvailable(); protected: + Error - DoReadRegisterValue(uint32_t offset, - const char* reg_name, - uint32_t size, - RegisterValue &value) override; + Read_SR_Config(uint32_t offset, const char *reg_name, uint32_t size, + RegisterValue &value); Error - DoWriteRegisterValue(uint32_t offset, - const char* reg_name, - const RegisterValue &value) override; + ReadRegisterRaw(uint32_t reg_index, RegisterValue &value) override; Error DoReadWatchPointRegisterValue(lldb::tid_t tid, void* watch_readback); Error + WriteRegisterRaw(uint32_t reg_index, + const RegisterValue &value) override; + + Error DoWriteWatchPointRegisterValue(lldb::tid_t tid, void* watch_readback); bool Modified: vendor/lldb/dist/source/Plugins/Process/Utility/RegisterInfos_mips.h ============================================================================== --- vendor/lldb/dist/source/Plugins/Process/Utility/RegisterInfos_mips.h Fri Nov 25 19:14:50 2016 (r309163) +++ vendor/lldb/dist/source/Plugins/Process/Utility/RegisterInfos_mips.h Fri Nov 25 19:15:31 2016 (r309164) @@ -35,9 +35,14 @@ LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) // Note that the size and offset will be updated by platform-specific classes. -#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((GPR_linux_mips*)NULL)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \ - eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL, NULL, 0} +#define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \ + { \ + #reg, alt, sizeof(((GPR_linux_mips *) NULL)->reg) / 2, \ + GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ + {kind1, kind2, kind3, ptrace_##reg##_mips, \ + gpr_##reg##_mips }, \ + NULL, NULL, NULL, 0 \ + } const uint8_t dwarf_opcode_mips [] = { llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1, @@ -45,13 +50,24 @@ const uint8_t dwarf_opcode_mips [] = { llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr }; -#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingIEEE754, \ - eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, dwarf_opcode_mips, sizeof(dwarf_opcode_mips)} - -#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \ - eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, NULL, 0} +#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \ + { \ + #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \ + FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \ + {kind1, kind2, kind3, ptrace_##reg##_mips, \ + fpr_##reg##_mips }, \ + NULL, NULL, dwarf_opcode_mips, \ + sizeof(dwarf_opcode_mips) \ + } + +#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \ + { \ + #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \ + FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ + {kind1, kind2, kind3, ptrace_##reg##_mips, \ + fpr_##reg##_mips }, \ + NULL, NULL, NULL, 0 \ + } #define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \ { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \ @@ -63,120 +79,211 @@ const uint8_t dwarf_opcode_mips [] = { // RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB -static RegisterInfo -g_register_infos_mips[] = -{ - DEFINE_GPR (zero, "zero", dwarf_zero_mips, dwarf_zero_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r4, nullptr, dwarf_r4_mips, dwarf_r4_mips, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), - DEFINE_GPR (r5, nullptr, dwarf_r5_mips, dwarf_r5_mips, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), - DEFINE_GPR (r6, nullptr, dwarf_r6_mips, dwarf_r6_mips, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), - DEFINE_GPR (r7, nullptr, dwarf_r7_mips, dwarf_r7_mips, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), - DEFINE_GPR (r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r10, nullptr, dwarf_r10_mips, dwarf_r10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r11, nullptr, dwarf_r11_mips, dwarf_r11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r12, nullptr, dwarf_r12_mips, dwarf_r12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r13, nullptr, dwarf_r13_mips, dwarf_r13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r14, nullptr, dwarf_r14_mips, dwarf_r14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r15, nullptr, dwarf_r15_mips, dwarf_r15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r16, nullptr, dwarf_r16_mips, dwarf_r16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r17, nullptr, dwarf_r17_mips, dwarf_r17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r18, nullptr, dwarf_r18_mips, dwarf_r18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r19, nullptr, dwarf_r19_mips, dwarf_r19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r20, nullptr, dwarf_r20_mips, dwarf_r20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r21, nullptr, dwarf_r21_mips, dwarf_r21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r22, nullptr, dwarf_r22_mips, dwarf_r22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r23, nullptr, dwarf_r23_mips, dwarf_r23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r24, nullptr, dwarf_r24_mips, dwarf_r24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r25, nullptr, dwarf_r25_mips, dwarf_r25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r26, nullptr, dwarf_r26_mips, dwarf_r26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (r27, nullptr, dwarf_r27_mips, dwarf_r27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (gp, "gp", dwarf_gp_mips, dwarf_gp_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (sp, "sp", dwarf_sp_mips, dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), - DEFINE_GPR (r30, "fp", dwarf_r30_mips, dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), - DEFINE_GPR (ra, "ra", dwarf_ra_mips, dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM), - DEFINE_GPR (sr, "status", dwarf_sr_mips, dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), - DEFINE_GPR (mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (cause, nullptr, dwarf_cause_mips, dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (pc, nullptr, dwarf_pc_mips, dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), - DEFINE_GPR (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f10, nullptr, dwarf_f10_mips, dwarf_f10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f11, nullptr, dwarf_f11_mips, dwarf_f11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f12, nullptr, dwarf_f12_mips, dwarf_f12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f13, nullptr, dwarf_f13_mips, dwarf_f13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f14, nullptr, dwarf_f14_mips, dwarf_f14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f15, nullptr, dwarf_f15_mips, dwarf_f15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f16, nullptr, dwarf_f16_mips, dwarf_f16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f17, nullptr, dwarf_f17_mips, dwarf_f17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f18, nullptr, dwarf_f18_mips, dwarf_f18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f19, nullptr, dwarf_f19_mips, dwarf_f19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f20, nullptr, dwarf_f20_mips, dwarf_f20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f21, nullptr, dwarf_f21_mips, dwarf_f21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f22, nullptr, dwarf_f22_mips, dwarf_f22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f23, nullptr, dwarf_f23_mips, dwarf_f23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f24, nullptr, dwarf_f24_mips, dwarf_f24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f25, nullptr, dwarf_f25_mips, dwarf_f25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f26, nullptr, dwarf_f26_mips, dwarf_f26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f27, nullptr, dwarf_f27_mips, dwarf_f27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f28, nullptr, dwarf_f28_mips, dwarf_f28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f29, nullptr, dwarf_f29_mips, dwarf_f29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f30, nullptr, dwarf_f30_mips, dwarf_f30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (f31, nullptr, dwarf_f31_mips, dwarf_f31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w10, nullptr, dwarf_w10_mips, dwarf_w10_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w11, nullptr, dwarf_w11_mips, dwarf_w11_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w12, nullptr, dwarf_w12_mips, dwarf_w12_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w13, nullptr, dwarf_w13_mips, dwarf_w13_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w14, nullptr, dwarf_w14_mips, dwarf_w14_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w15, nullptr, dwarf_w15_mips, dwarf_w15_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w16, nullptr, dwarf_w16_mips, dwarf_w16_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w17, nullptr, dwarf_w17_mips, dwarf_w17_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w18, nullptr, dwarf_w18_mips, dwarf_w18_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w19, nullptr, dwarf_w19_mips, dwarf_w19_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w20, nullptr, dwarf_w10_mips, dwarf_w20_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w21, nullptr, dwarf_w21_mips, dwarf_w21_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w22, nullptr, dwarf_w22_mips, dwarf_w22_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w23, nullptr, dwarf_w23_mips, dwarf_w23_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w24, nullptr, dwarf_w24_mips, dwarf_w24_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w25, nullptr, dwarf_w25_mips, dwarf_w25_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w26, nullptr, dwarf_w26_mips, dwarf_w26_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w27, nullptr, dwarf_w27_mips, dwarf_w27_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w28, nullptr, dwarf_w28_mips, dwarf_w28_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w29, nullptr, dwarf_w29_mips, dwarf_w29_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w30, nullptr, dwarf_w30_mips, dwarf_w30_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA (w31, nullptr, dwarf_w31_mips, dwarf_w31_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO (mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO (mir, nullptr, dwarf_mir_mips, dwarf_mir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO (fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO (fir, nullptr, dwarf_fir_mips, dwarf_fir_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO (config5, nullptr, dwarf_config5_mips, dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM) +static RegisterInfo g_register_infos_mips[] = { + DEFINE_GPR(zero, "zero", dwarf_zero_mips, dwarf_zero_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r1, "at", dwarf_r1_mips, dwarf_r1_mips, LLDB_INVALID_REGNUM), + DEFINE_GPR(r2, nullptr, dwarf_r2_mips, dwarf_r2_mips, LLDB_INVALID_REGNUM), + DEFINE_GPR(r3, nullptr, dwarf_r3_mips, dwarf_r3_mips, LLDB_INVALID_REGNUM), + DEFINE_GPR(r4, nullptr, dwarf_r4_mips, dwarf_r4_mips, + LLDB_REGNUM_GENERIC_ARG1), + DEFINE_GPR(r5, nullptr, dwarf_r5_mips, dwarf_r5_mips, + LLDB_REGNUM_GENERIC_ARG2), + DEFINE_GPR(r6, nullptr, dwarf_r6_mips, dwarf_r6_mips, + LLDB_REGNUM_GENERIC_ARG3), + DEFINE_GPR(r7, nullptr, dwarf_r7_mips, dwarf_r7_mips, + LLDB_REGNUM_GENERIC_ARG4), + DEFINE_GPR(r8, nullptr, dwarf_r8_mips, dwarf_r8_mips, LLDB_INVALID_REGNUM), + DEFINE_GPR(r9, nullptr, dwarf_r9_mips, dwarf_r9_mips, LLDB_INVALID_REGNUM), + DEFINE_GPR(r10, nullptr, dwarf_r10_mips, dwarf_r10_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r11, nullptr, dwarf_r11_mips, dwarf_r11_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r12, nullptr, dwarf_r12_mips, dwarf_r12_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r13, nullptr, dwarf_r13_mips, dwarf_r13_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r14, nullptr, dwarf_r14_mips, dwarf_r14_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r15, nullptr, dwarf_r15_mips, dwarf_r15_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r16, nullptr, dwarf_r16_mips, dwarf_r16_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r17, nullptr, dwarf_r17_mips, dwarf_r17_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r18, nullptr, dwarf_r18_mips, dwarf_r18_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r19, nullptr, dwarf_r19_mips, dwarf_r19_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r20, nullptr, dwarf_r20_mips, dwarf_r20_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r21, nullptr, dwarf_r21_mips, dwarf_r21_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r22, nullptr, dwarf_r22_mips, dwarf_r22_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r23, nullptr, dwarf_r23_mips, dwarf_r23_mips, + LLDB_INVALID_REGNUM), + DEFINE_GPR(r24, nullptr, dwarf_r24_mips, dwarf_r24_mips, *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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