From owner-cvs-all@FreeBSD.ORG Fri Aug 11 19:22:57 2006 Return-Path: X-Original-To: cvs-all@FreeBSD.org Delivered-To: cvs-all@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 8D7AC16A4DA; Fri, 11 Aug 2006 19:22:57 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 3940243D45; Fri, 11 Aug 2006 19:22:57 +0000 (GMT) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k7BJMvD3009011; Fri, 11 Aug 2006 19:22:57 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from jhb@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k7BJMvpS009010; Fri, 11 Aug 2006 19:22:57 GMT (envelope-from jhb) Message-Id: <200608111922.k7BJMvpS009010@repoman.freebsd.org> From: John Baldwin Date: Fri, 11 Aug 2006 19:22:57 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/amd64/acpica madt.c src/sys/amd64/amd64 pmap.c src/sys/amd64/include pmap.h src/sys/dev/acpica/Osd OsdMemory.c src/sys/i386/acpica acpi_machdep.c madt.c src/sys/i386/i386 pmap.c src/sys/i386/include pmap.h src/sys/ia64/include pmap.h X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Aug 2006 19:22:57 -0000 jhb 2006-08-11 19:22:57 UTC FreeBSD src repository Modified files: sys/amd64/acpica madt.c sys/amd64/amd64 pmap.c sys/amd64/include pmap.h sys/dev/acpica/Osd OsdMemory.c sys/i386/acpica acpi_machdep.c madt.c sys/i386/i386 pmap.c sys/i386/include pmap.h sys/ia64/include pmap.h Log: First pass at allowing memory to be mapped using cache modes other than WB (write-back) on x86 via control bits in PTEs and PDEs (including making use of the PAT MSR). Changes include: - A new pmap_mapdev_attr() function for amd64 and i386 which takes an additional parameter (relative to pmap_mapdev()) specifying the cache mode for this mapping. Note that on amd64 only WB mappings are done with the direct map, all other modes result in a private mapping. - pmap_mapdev() on i386 and amd64 now defaults to using UC (uncached) mappings rather than WB. Previously we relied on the BIOS setting up MTRR's to enforce memio regions being treated as UC. This might make hw.cbb_start_memory unnecessary in some cases now for example. - A new pmap_mapbios()/pmap_unmapbios() API has been added to allow places that used pmap_mapdev() to map non-device memory (such as ACPI tables) to do so using WB as before. - A new pmap_change_attr() function for amd64 and i386 that changes the caching mode for a range of KVA. Reviewed by: alc Revision Changes Path 1.21 +5 -5 src/sys/amd64/acpica/madt.c 1.570 +220 -4 src/sys/amd64/amd64/pmap.c 1.134 +5 -0 src/sys/amd64/include/pmap.h 1.14 +2 -2 src/sys/dev/acpica/Osd/OsdMemory.c 1.33 +2 -2 src/sys/i386/acpica/acpi_machdep.c 1.24 +5 -5 src/sys/i386/acpica/madt.c 1.574 +169 -2 src/sys/i386/i386/pmap.c 1.122 +5 -0 src/sys/i386/include/pmap.h 1.27 +2 -0 src/sys/ia64/include/pmap.h