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Date:      Wed, 21 Jul 1999 23:28:32 -0700
From:      Mike Smith <mike@smith.net.au>
To:        "David Schwartz" <davids@webmaster.com>
Cc:        stable@freebsd.org
Subject:   Re: Tuning the system's clock 
Message-ID:  <199907220628.XAA01044@dingo.cdrom.com>
In-Reply-To: Your message of "Tue, 20 Jul 1999 15:08:08 PDT." <000001bed2fc$593b6990$021d85d1@youwant.to> 

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> 
> 	FreeBSD's internal high-precision clock seems to be based on the
> processor's instruction cycle counter. I've found that on one machine, the
> clock is about 150 ppm fast. So I tried to reduce the machdep.tsc_freq
> value. That was bad -- instant reboot.

The TSC is calibrated at boot time using the RTC; that calibration is 
inherently limited to the accuracy of the RTC.

> Are the NTP pll values for mult/div documented anywhere? It seems to divide
> before it multiplies, which means that using them for small offsets would
> require high divisors, and hence a loss of accuracy.

The TSC is ill-suited to precision timekeeping, as the CPU clock 
frequency is not particularly precise, nor is it guaranteed to remain 
at any given value (many power-management schemes adjust the CPU clock 
to control power consumption).  The only real use for the TSC is 
accounting for total elapsed clock cycles over some code fragment (and 
even that's compromised by SMM).

If you want to do accurate timekeeping on a PC, use add-in hardware 
designed for the purpose.  You will find nothing in the standard PC 
architecture suited to the task.  You might want to talk to Poul about 
the XRPU hardware that he's been using for this very task.  
(phk@freebsd.org)
-- 
\\  The mind's the standard       \\  Mike Smith
\\  of the man.                   \\  msmith@freebsd.org
\\    -- Joseph Merrick           \\  msmith@cdrom.com




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