Date: Thu, 19 Nov 2009 08:59:28 +0000 (UTC) From: Roman Divacky <rdivacky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r199511 - in vendor/llvm/dist: . autoconf include/llvm/ADT include/llvm/CodeGen include/llvm/Support include/llvm/Target include/llvm/Transforms/Utils lib/Analysis lib/CodeGen lib/CodeG... Message-ID: <200911190859.nAJ8xSxh099240@svn.freebsd.org>
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Author: rdivacky Date: Thu Nov 19 08:59:28 2009 New Revision: 199511 URL: http://svn.freebsd.org/changeset/base/199511 Log: Update LLVM to r89337. Added: vendor/llvm/dist/test/CodeGen/ARM/tail-opts.ll vendor/llvm/dist/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll vendor/llvm/dist/test/CodeGen/X86/unaligned-load.ll vendor/llvm/dist/test/CodeGen/XCore/indirectbr.ll vendor/llvm/dist/utils/TableGen/OptParserEmitter.cpp vendor/llvm/dist/utils/TableGen/OptParserEmitter.h Modified: vendor/llvm/dist/CMakeLists.txt vendor/llvm/dist/Makefile.rules vendor/llvm/dist/autoconf/config.guess vendor/llvm/dist/autoconf/config.sub vendor/llvm/dist/include/llvm/ADT/Twine.h vendor/llvm/dist/include/llvm/CodeGen/LiveIntervalAnalysis.h vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h vendor/llvm/dist/include/llvm/Support/MemoryBuffer.h vendor/llvm/dist/include/llvm/Target/SubtargetFeature.h vendor/llvm/dist/include/llvm/Transforms/Utils/Local.h vendor/llvm/dist/lib/Analysis/IVUsers.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.cpp vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp vendor/llvm/dist/lib/CodeGen/LiveIntervalAnalysis.cpp vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp vendor/llvm/dist/lib/CodeGen/PHIElimination.cpp vendor/llvm/dist/lib/CodeGen/PHIElimination.h vendor/llvm/dist/lib/CodeGen/RegAllocLinearScan.cpp vendor/llvm/dist/lib/CodeGen/Spiller.cpp vendor/llvm/dist/lib/CodeGen/Spiller.h vendor/llvm/dist/lib/CodeGen/TwoAddressInstructionPass.cpp vendor/llvm/dist/lib/CodeGen/VirtRegRewriter.cpp vendor/llvm/dist/lib/Target/ARM/ARM.td vendor/llvm/dist/lib/Target/ARM/ARMISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.td vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb.td vendor/llvm/dist/lib/Target/ARM/ARMScheduleV6.td vendor/llvm/dist/lib/Target/ARM/ARMScheduleV7.td vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h vendor/llvm/dist/lib/Target/ARM/Thumb2SizeReduction.cpp vendor/llvm/dist/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp vendor/llvm/dist/lib/Target/Mips/MipsISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/Mips/MipsRegisterInfo.h vendor/llvm/dist/lib/Target/Mips/MipsRegisterInfo.td vendor/llvm/dist/lib/Target/Mips/MipsTargetObjectFile.cpp vendor/llvm/dist/lib/Target/SubtargetFeature.cpp vendor/llvm/dist/lib/Target/TargetLoweringObjectFile.cpp vendor/llvm/dist/lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp vendor/llvm/dist/lib/Target/XCore/XCoreISelLowering.cpp vendor/llvm/dist/lib/Target/XCore/XCoreISelLowering.h vendor/llvm/dist/lib/Target/XCore/XCoreInstrInfo.td vendor/llvm/dist/lib/Transforms/Utils/LoopSimplify.cpp vendor/llvm/dist/lib/Transforms/Utils/SimplifyCFG.cpp vendor/llvm/dist/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll vendor/llvm/dist/test/CodeGen/Thumb/pop.ll vendor/llvm/dist/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll vendor/llvm/dist/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll vendor/llvm/dist/test/CodeGen/Thumb2/large-stack.ll vendor/llvm/dist/test/CodeGen/Thumb2/ldr-str-imm12.ll vendor/llvm/dist/test/FrontendC++/2009-07-15-LineNumbers.cpp vendor/llvm/dist/tools/lto/LTOCodeGenerator.cpp vendor/llvm/dist/tools/lto/LTOModule.cpp vendor/llvm/dist/tools/lto/LTOModule.h vendor/llvm/dist/utils/TableGen/CMakeLists.txt vendor/llvm/dist/utils/TableGen/TableGen.cpp vendor/llvm/dist/utils/lit/TestFormats.py Modified: vendor/llvm/dist/CMakeLists.txt ============================================================================== --- vendor/llvm/dist/CMakeLists.txt Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/CMakeLists.txt Thu Nov 19 08:59:28 2009 (r199511) @@ -323,7 +323,7 @@ if(LLVM_BUILD_TOOLS) add_subdirectory(tools) endif() -option(LLVM_BUILD_EXAMPLES "Build LLVM example programs." ON) +option(LLVM_BUILD_EXAMPLES "Build LLVM example programs." OFF) if(LLVM_BUILD_EXAMPLES) add_subdirectory(examples) endif () Modified: vendor/llvm/dist/Makefile.rules ============================================================================== --- vendor/llvm/dist/Makefile.rules Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/Makefile.rules Thu Nov 19 08:59:28 2009 (r199511) @@ -736,6 +736,8 @@ else Ranlib = ranlib endif +AliasTool = ln -s + #---------------------------------------------------------- # Get the list of source files and compute object file # names from them. @@ -1215,10 +1217,20 @@ ifdef TOOLNAME #--------------------------------------------------------- # Set up variables for building a tool. #--------------------------------------------------------- +TOOLEXENAME := $(strip $(TOOLNAME))$(EXEEXT) +ifdef EXAMPLE_TOOL +ToolBuildPath := $(ExmplDir)/$(TOOLEXENAME) +else +ToolBuildPath := $(ToolDir)/$(TOOLEXENAME) +endif + +# TOOLALIAS is a name to symlink (or copy) the tool to. +ifdef TOOLALIAS ifdef EXAMPLE_TOOL -ToolBuildPath := $(ExmplDir)/$(strip $(TOOLNAME))$(EXEEXT) +ToolAliasBuildPath := $(ExmplDir)/$(strip $(TOOLALIAS))$(EXEEXT) else -ToolBuildPath := $(ToolDir)/$(strip $(TOOLNAME))$(EXEEXT) +ToolAliasBuildPath := $(ToolDir)/$(strip $(TOOLALIAS))$(EXEEXT) +endif endif #--------------------------------------------------------- @@ -1246,12 +1258,15 @@ endif #--------------------------------------------------------- # Provide targets for building the tools #--------------------------------------------------------- -all-local:: $(ToolBuildPath) +all-local:: $(ToolBuildPath) $(ToolAliasBuildPath) clean-local:: ifneq ($(strip $(ToolBuildPath)),) -$(Verb) $(RM) -f $(ToolBuildPath) endif +ifneq ($(strip $(ToolAliasBuildPath)),) + -$(Verb) $(RM) -f $(ToolAliasBuildPath) +endif ifdef EXAMPLE_TOOL $(ToolBuildPath): $(ExmplDir)/.dir @@ -1266,13 +1281,22 @@ $(ToolBuildPath): $(ObjectsO) $(ProjLibs $(Echo) ======= Finished Linking $(BuildMode) Executable $(TOOLNAME) \ $(StripWarnMsg) +ifneq ($(strip $(ToolAliasBuildPath)),) +$(ToolAliasBuildPath): $(ToolBuildPath) + $(Echo) Creating $(BuildMode) Alias $(TOOLALIAS) $(StripWarnMsg) + $(Verb) $(RM) -f $(ToolAliasBuildPath) + $(Verb) $(AliasTool) $(TOOLEXENAME) $(ToolAliasBuildPath) + $(Echo) ======= Finished Creating $(BuildMode) Alias $(TOOLNAME) \ + $(StripWarnMsg) +endif + ifdef NO_INSTALL install-local:: $(Echo) Install circumvented with NO_INSTALL uninstall-local:: $(Echo) Uninstall circumvented with NO_INSTALL else -DestTool = $(PROJ_bindir)/$(TOOLNAME)$(EXEEXT) +DestTool = $(PROJ_bindir)/$(TOOLEXENAME) install-local:: $(DestTool) @@ -1283,6 +1307,23 @@ $(DestTool): $(ToolBuildPath) $(PROJ_bin uninstall-local:: $(Echo) Uninstalling $(BuildMode) $(DestTool) -$(Verb) $(RM) -f $(DestTool) + +# TOOLALIAS install. +ifdef TOOLALIAS +DestToolAlias = $(PROJ_bindir)/$(TOOLALIAS)$(EXEEXT) + +install-local:: $(DestToolAlias) + +$(DestToolAlias): $(DestTool) $(PROJ_bindir) + $(Echo) Installing $(BuildMode) $(DestToolAlias) + $(Verb) $(RM) -f $(DestToolAlias) + $(Verb) $(AliasTool) $(TOOLEXENAME) $(DestToolAlias) + +uninstall-local:: + $(Echo) Uninstalling $(BuildMode) $(DestToolAlias) + -$(Verb) $(RM) -f $(DestToolAlias) +endif + endif endif Modified: vendor/llvm/dist/autoconf/config.guess ============================================================================== --- vendor/llvm/dist/autoconf/config.guess Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/autoconf/config.guess Thu Nov 19 08:59:28 2009 (r199511) @@ -333,6 +333,10 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:$ sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; + i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*) + AUX_ARCH="i386" + echo ${AUX_ARCH}-pc-auroraux`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*) eval $set_cc_for_build SUN_ARCH="i386" Modified: vendor/llvm/dist/autoconf/config.sub ============================================================================== --- vendor/llvm/dist/autoconf/config.sub Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/autoconf/config.sub Thu Nov 19 08:59:28 2009 (r199511) @@ -1256,6 +1256,9 @@ case $os in -solaris1 | -solaris1.*) os=`echo $os | sed -e 's|solaris1|sunos4|'` ;; + -auroraux) + os=-auroraux + ;; -solaris) os=-solaris2 ;; @@ -1274,7 +1277,7 @@ case $os in # -sysv* is not here because it comes later, after sysvr4. -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \ | -*vms* | -sco* | -esix* | -isc* | -aix* | -cnk* | -sunos | -sunos[34]*\ - | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \ + | -hpux* | -unos* | -osf* | -luna* | -dgux* | -auroraux* | -solaris* | -sym* \ | -kopensolaris* \ | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \ | -aos* | -aros* \ Modified: vendor/llvm/dist/include/llvm/ADT/Twine.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/Twine.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/ADT/Twine.h Thu Nov 19 08:59:28 2009 (r199511) @@ -133,9 +133,9 @@ namespace llvm { /// Null or Empty kinds. const void *RHS; /// LHSKind - The NodeKind of the left hand side, \see getLHSKind(). - NodeKind LHSKind : 8; + unsigned char LHSKind; /// RHSKind - The NodeKind of the left hand side, \see getLHSKind(). - NodeKind RHSKind : 8; + unsigned char RHSKind; private: /// Construct a nullary twine; the kind must be NullKind or EmptyKind. @@ -209,10 +209,10 @@ namespace llvm { } /// getLHSKind - Get the NodeKind of the left-hand side. - NodeKind getLHSKind() const { return LHSKind; } + NodeKind getLHSKind() const { return (NodeKind) LHSKind; } /// getRHSKind - Get the NodeKind of the left-hand side. - NodeKind getRHSKind() const { return RHSKind; } + NodeKind getRHSKind() const { return (NodeKind) RHSKind; } /// printOneChild - Print one child from a twine. void printOneChild(raw_ostream &OS, const void *Ptr, NodeKind Kind) const; Modified: vendor/llvm/dist/include/llvm/CodeGen/LiveIntervalAnalysis.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Nov 19 08:59:28 2009 (r199511) @@ -60,9 +60,6 @@ namespace llvm { typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap; Reg2IntervalMap r2iMap_; - /// phiJoinCopies - Copy instructions which are PHI joins. - SmallVector<MachineInstr*, 16> phiJoinCopies; - /// allocatableRegs_ - A bit vector of allocatable registers. BitVector allocatableRegs_; @@ -278,13 +275,6 @@ namespace llvm { /// computeIntervals - Compute live intervals. void computeIntervals(); - bool isSafeAndProfitableToCoalesce(LiveInterval &DstInt, - LiveInterval &SrcInt, - SmallVector<MachineInstr*,16> &IdentCopies, - SmallVector<MachineInstr*,16> &OtherCopies); - - void performEarlyCoalescing(); - /// handleRegisterDef - update intervals for a register def /// (calls handlePhysicalRegisterDef and /// handleVirtualRegisterDef) Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h Thu Nov 19 08:59:28 2009 (r199511) @@ -233,7 +233,7 @@ public: /// verify - Run the current MachineFunction through the machine code /// verifier, useful for debugger use. - void verify() const; + void verify(Pass *p=NULL, bool allowDoubleDefs=false) const; // Provide accessors for the MachineBasicBlock list... typedef BasicBlockListType::iterator iterator; Modified: vendor/llvm/dist/include/llvm/Support/MemoryBuffer.h ============================================================================== --- vendor/llvm/dist/include/llvm/Support/MemoryBuffer.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/Support/MemoryBuffer.h Thu Nov 19 08:59:28 2009 (r199511) @@ -24,7 +24,7 @@ namespace llvm { /// of memory, and provides simple methods for reading files and standard input /// into a memory buffer. In addition to basic access to the characters in the /// file, this interface guarantees you can read one character past the end of -/// @verbatim the file, and that this character will read as '\0'. @endverbatim +/// the file, and that this character will read as '\0'. class MemoryBuffer { const char *BufferStart; // Start of the buffer. const char *BufferEnd; // End of the buffer. Modified: vendor/llvm/dist/include/llvm/Target/SubtargetFeature.h ============================================================================== --- vendor/llvm/dist/include/llvm/Target/SubtargetFeature.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/Target/SubtargetFeature.h Thu Nov 19 08:59:28 2009 (r199511) @@ -21,6 +21,7 @@ #include <string> #include <vector> #include <cstring> +#include "llvm/ADT/Triple.h" #include "llvm/System/DataTypes.h" namespace llvm { @@ -106,6 +107,10 @@ public: // Dump feature info. void dump() const; + + /// Retrieve a formatted string of the default features for + /// the specified target triple. + static std::string getDefaultSubtargetFeatures(const Triple &Triple); }; } // End namespace llvm Modified: vendor/llvm/dist/include/llvm/Transforms/Utils/Local.h ============================================================================== --- vendor/llvm/dist/include/llvm/Transforms/Utils/Local.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/include/llvm/Transforms/Utils/Local.h Thu Nov 19 08:59:28 2009 (r199511) @@ -107,7 +107,14 @@ void MergeBasicBlockIntoOnlyPred(BasicBl /// rewriting all the predecessors to branch to the successor block and return /// true. If we can't transform, return false. bool TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB); - + +/// EliminateDuplicatePHINodes - Check for and eliminate duplicate PHI +/// nodes in this block. This doesn't try to be clever about PHI nodes +/// which differ only in the order of the incoming values, but instcombine +/// orders them so it usually won't matter. +/// +bool EliminateDuplicatePHINodes(BasicBlock *BB); + /// SimplifyCFG - This function is used to do simplification of a CFG. For /// example, it adjusts branches to branches to eliminate the extra hop, it /// eliminates unreachable basic blocks, and does other "peephole" optimization Modified: vendor/llvm/dist/lib/Analysis/IVUsers.cpp ============================================================================== --- vendor/llvm/dist/lib/Analysis/IVUsers.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/Analysis/IVUsers.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -24,6 +24,7 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Support/CommandLine.h" #include <algorithm> using namespace llvm; @@ -31,6 +32,10 @@ char IVUsers::ID = 0; static RegisterPass<IVUsers> X("iv-users", "Induction Variable Users", false, true); +static cl::opt<bool> +SimplifyIVUsers("simplify-iv-users", cl::Hidden, cl::init(false), + cl::desc("Restrict IV Users to loop-invariant strides")); + Pass *llvm::createIVUsersPass() { return new IVUsers(); } @@ -208,6 +213,11 @@ bool IVUsers::AddUsersIfInteresting(Inst if (!getSCEVStartAndStride(ISE, L, UseLoop, Start, Stride, SE, DT)) return false; // Non-reducible symbolic expression, bail out. + // Keep things simple. Don't touch loop-variant strides. + if (SimplifyIVUsers && !Stride->isLoopInvariant(L) + && L->contains(I->getParent())) + return false; + SmallPtrSet<Instruction *, 4> UniqueUsers; for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E; ++UI) { Modified: vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -727,7 +727,8 @@ void DwarfException::EmitExceptionTable( // somewhere. This predicate should be moved to a shared location that is // in target-independent code. // - if (LSDASection->getKind().isWriteable() || + if ((LSDASection->getKind().isWriteable() && + !LSDASection->getKind().isReadOnlyWithRel()) || Asm->TM.getRelocationModel() == Reloc::Static) TTypeFormat = dwarf::DW_EH_PE_absptr; else @@ -917,14 +918,36 @@ void DwarfException::EmitExceptionTable( } // Emit the Catch TypeInfos. + const TargetLoweringObjectFile &TLOF = Asm->getObjFileLowering(); + unsigned Index = 1; + for (std::vector<GlobalVariable *>::const_reverse_iterator I = TypeInfos.rbegin(), E = TypeInfos.rend(); I != E; ++I) { - const GlobalVariable *GV = *I; - PrintRelDirective(); + const GlobalVariable *TI = *I; + + if (TI) { + if (!LSDASection->getKind().isReadOnlyWithRel() && + (TTypeFormat == dwarf::DW_EH_PE_absptr || + TI->getLinkage() == GlobalValue::InternalLinkage)) { + // Print out the unadorned name of the type info. + PrintRelDirective(); + O << Asm->Mang->getMangledName(TI); + } else { + bool IsTypeInfoIndirect = false, IsTypeInfoPCRel = false; + const MCExpr *TypeInfoRef = + TLOF.getSymbolForDwarfGlobalReference(TI, Asm->Mang, Asm->MMI, + IsTypeInfoIndirect, + IsTypeInfoPCRel); + + if (!IsTypeInfoPCRel) + TypeInfoRef = CreateLabelDiff(TypeInfoRef, "typeinforef_addr", + Index++); - if (GV) { - O << Asm->Mang->getMangledName(GV); + O << MAI->getData32bitsDirective(); + TypeInfoRef->print(O, MAI); + } } else { + PrintRelDirective(); O << "0x0"; } Modified: vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -41,8 +41,12 @@ using namespace llvm; STATISTIC(NumDeadBlocks, "Number of dead blocks removed"); STATISTIC(NumBranchOpts, "Number of branches optimized"); STATISTIC(NumTailMerge , "Number of block tails merged"); +STATISTIC(NumTailDups , "Number of tail duplicated blocks"); +STATISTIC(NumInstrDups , "Additional instructions due to tail duplication"); + static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden); + // Throttle for huge numbers of predecessors (compile speed problems) static cl::opt<unsigned> TailMergeThreshold("tail-merge-threshold", @@ -193,7 +197,6 @@ bool BranchFolder::OptimizeFunction(Mach MadeChange |= OptimizeImpDefsBlock(MBB); } - bool MadeChangeThisIteration = true; while (MadeChangeThisIteration) { MadeChangeThisIteration = false; @@ -202,10 +205,15 @@ bool BranchFolder::OptimizeFunction(Mach MadeChange |= MadeChangeThisIteration; } - // Do tail duplication once after tail merging is done. Otherwise it is + // Do tail duplication after tail merging is done. Otherwise it is // tough to avoid situations where tail duplication and tail merging undo // each other's transformations ad infinitum. - MadeChange |= TailDuplicateBlocks(MF); + MadeChangeThisIteration = true; + while (MadeChangeThisIteration) { + MadeChangeThisIteration = false; + MadeChangeThisIteration |= TailDuplicateBlocks(MF); + MadeChange |= MadeChangeThisIteration; + } // See if any jump tables have become mergable or dead as the code generator // did its thing. @@ -1003,9 +1011,6 @@ static bool IsBetterFallthrough(MachineB bool BranchFolder::TailDuplicateBlocks(MachineFunction &MF) { bool MadeChange = false; - // Make sure blocks are numbered in order - MF.RenumberBlocks(); - for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) { MachineBasicBlock *MBB = I++; @@ -1017,6 +1022,7 @@ bool BranchFolder::TailDuplicateBlocks(M // If it is dead, remove it. if (MBB->pred_empty()) { + NumInstrDups -= MBB->size(); RemoveDeadBlock(MBB); MadeChange = true; ++NumDeadBlocks; @@ -1097,6 +1103,7 @@ bool BranchFolder::TailDuplicate(Machine MachineInstr *NewMI = MF.CloneMachineInstr(I); PredBB->insert(PredBB->end(), NewMI); } + NumInstrDups += TailBB->size() - 1; // subtract one for removed branch // Update the CFG. PredBB->removeSuccessor(PredBB->succ_begin()); @@ -1107,6 +1114,7 @@ bool BranchFolder::TailDuplicate(Machine PredBB->addSuccessor(*I); Changed = true; + ++NumTailDups; } // If TailBB was duplicated into all its predecessors except for the prior Modified: vendor/llvm/dist/lib/CodeGen/LiveIntervalAnalysis.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -53,16 +53,9 @@ static cl::opt<bool> DisableReMat("disab static cl::opt<bool> EnableFastSpilling("fast-spill", cl::init(false), cl::Hidden); -static cl::opt<bool> EarlyCoalescing("early-coalescing", - cl::init(false), cl::Hidden); - -static cl::opt<int> CoalescingLimit("early-coalescing-limit", - cl::init(-1), cl::Hidden); - STATISTIC(numIntervals , "Number of original intervals"); STATISTIC(numFolds , "Number of loads/stores folded into instructions"); STATISTIC(numSplits , "Number of intervals split"); -STATISTIC(numCoalescing, "Number of early coalescing performed"); char LiveIntervals::ID = 0; static RegisterPass<LiveIntervals> X("liveintervals", "Live Interval Analysis"); @@ -96,7 +89,6 @@ void LiveIntervals::releaseMemory() { delete I->second; r2iMap_.clear(); - phiJoinCopies.clear(); // Release VNInfo memroy regions after all VNInfo objects are dtor'd. VNInfoAllocator.Reset(); @@ -121,7 +113,6 @@ bool LiveIntervals::runOnMachineFunction allocatableRegs_ = tri_->getAllocatableSet(fn); computeIntervals(); - performEarlyCoalescing(); numIntervals += getNumIntervals(); @@ -409,7 +400,6 @@ void LiveIntervals::handleVirtualRegiste // Remove the old range that we now know has an incorrect number. VNInfo *VNI = interval.getValNumInfo(0); MachineInstr *Killer = vi.Kills[0]; - phiJoinCopies.push_back(Killer); SlotIndex Start = getMBBStartIdx(Killer->getParent()); SlotIndex End = getInstructionIndex(Killer).getDefIndex(); DEBUG({ @@ -653,133 +643,6 @@ void LiveIntervals::handleLiveInRegister DEBUG(errs() << " +" << LR << '\n'); } -bool LiveIntervals:: -isSafeAndProfitableToCoalesce(LiveInterval &DstInt, - LiveInterval &SrcInt, - SmallVector<MachineInstr*,16> &IdentCopies, - SmallVector<MachineInstr*,16> &OtherCopies) { - unsigned NumIdent = 0; - for (MachineRegisterInfo::def_iterator ri = mri_->def_begin(SrcInt.reg), - re = mri_->def_end(); ri != re; ++ri) { - MachineInstr *MI = &*ri; - unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; - if (!tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg)) - return false; - if (SrcReg != DstInt.reg) { - // Non-identity copy - we cannot handle overlapping intervals - if (DstInt.liveAt(getInstructionIndex(MI))) - return false; - OtherCopies.push_back(MI); - } else { - IdentCopies.push_back(MI); - ++NumIdent; - } - } - - return IdentCopies.size() > OtherCopies.size(); -} - -void LiveIntervals::performEarlyCoalescing() { - if (!EarlyCoalescing) - return; - - /// Perform early coalescing: eliminate copies which feed into phi joins - /// and whose sources are defined by the phi joins. - for (unsigned i = 0, e = phiJoinCopies.size(); i != e; ++i) { - MachineInstr *Join = phiJoinCopies[i]; - if (CoalescingLimit != -1 && (int)numCoalescing == CoalescingLimit) - break; - - unsigned PHISrc, PHIDst, SrcSubReg, DstSubReg; - bool isMove= tii_->isMoveInstr(*Join, PHISrc, PHIDst, SrcSubReg, DstSubReg); -#ifndef NDEBUG - assert(isMove && "PHI join instruction must be a move!"); -#else - isMove = isMove; -#endif - - LiveInterval &DstInt = getInterval(PHIDst); - LiveInterval &SrcInt = getInterval(PHISrc); - SmallVector<MachineInstr*, 16> IdentCopies; - SmallVector<MachineInstr*, 16> OtherCopies; - if (!isSafeAndProfitableToCoalesce(DstInt, SrcInt, - IdentCopies, OtherCopies)) - continue; - - DEBUG(errs() << "PHI Join: " << *Join); - assert(DstInt.containsOneValue() && "PHI join should have just one val#!"); - assert(std::distance(mri_->use_begin(PHISrc), mri_->use_end()) == 1 && - "PHI join src should not be used elsewhere"); - VNInfo *VNI = DstInt.getValNumInfo(0); - - // Change the non-identity copies to directly target the phi destination. - for (unsigned i = 0, e = OtherCopies.size(); i != e; ++i) { - MachineInstr *PHICopy = OtherCopies[i]; - SlotIndex MIIndex = getInstructionIndex(PHICopy); - DEBUG(errs() << "Moving: " << MIIndex << ' ' << *PHICopy); - SlotIndex DefIndex = MIIndex.getDefIndex(); - LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex); - SlotIndex StartIndex = SLR->start; - SlotIndex EndIndex = SLR->end; - - // Delete val# defined by the now identity copy and add the range from - // beginning of the mbb to the end of the range. - SrcInt.removeValNo(SLR->valno); - DEBUG(errs() << " added range [" << StartIndex << ',' - << EndIndex << "] to reg" << DstInt.reg << '\n'); - assert (!DstInt.liveAt(StartIndex) && "Cannot coalesce when dst live!"); - VNInfo *NewVNI = DstInt.getNextValue(DefIndex, PHICopy, true, - VNInfoAllocator); - NewVNI->setHasPHIKill(true); - DstInt.addRange(LiveRange(StartIndex, EndIndex, NewVNI)); - for (unsigned j = 0, ee = PHICopy->getNumOperands(); j != ee; ++j) { - MachineOperand &MO = PHICopy->getOperand(j); - if (!MO.isReg() || MO.getReg() != PHISrc) - continue; - MO.setReg(PHIDst); - } - } - - // Now let's eliminate all the would-be identity copies. - for (unsigned i = 0, e = IdentCopies.size(); i != e; ++i) { - MachineInstr *PHICopy = IdentCopies[i]; - DEBUG(errs() << "Coalescing: " << *PHICopy); - - SlotIndex MIIndex = getInstructionIndex(PHICopy); - SlotIndex DefIndex = MIIndex.getDefIndex(); - LiveRange *SLR = SrcInt.getLiveRangeContaining(DefIndex); - SlotIndex StartIndex = SLR->start; - SlotIndex EndIndex = SLR->end; - - // Delete val# defined by the now identity copy and add the range from - // beginning of the mbb to the end of the range. - SrcInt.removeValNo(SLR->valno); - RemoveMachineInstrFromMaps(PHICopy); - PHICopy->eraseFromParent(); - DEBUG(errs() << " added range [" << StartIndex << ',' - << EndIndex << "] to reg" << DstInt.reg << '\n'); - DstInt.addRange(LiveRange(StartIndex, EndIndex, VNI)); - } - - // Remove the phi join and update the phi block liveness. - SlotIndex MIIndex = getInstructionIndex(Join); - SlotIndex UseIndex = MIIndex.getUseIndex(); - SlotIndex DefIndex = MIIndex.getDefIndex(); - LiveRange *SLR = SrcInt.getLiveRangeContaining(UseIndex); - LiveRange *DLR = DstInt.getLiveRangeContaining(DefIndex); - DLR->valno->setCopy(0); - DLR->valno->setIsDefAccurate(false); - DstInt.addRange(LiveRange(SLR->start, SLR->end, DLR->valno)); - SrcInt.removeRange(SLR->start, SLR->end); - assert(SrcInt.empty()); - removeInterval(PHISrc); - RemoveMachineInstrFromMaps(Join); - Join->eraseFromParent(); - - ++numCoalescing; - } -} - /// computeIntervals - computes the live intervals for virtual /// registers. for some ordering of the machine instructions [1,N] a /// live interval is an interval [i, j) where 1 <= i <= j < N for Modified: vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -42,23 +42,18 @@ using namespace llvm; namespace { - struct MachineVerifier : public MachineFunctionPass { - static char ID; // Pass ID, replacement for typeid + struct MachineVerifier { - MachineVerifier(bool allowDoubleDefs = false) : - MachineFunctionPass(&ID), + MachineVerifier(Pass *pass, bool allowDoubleDefs) : + PASS(pass), allowVirtDoubleDefs(allowDoubleDefs), allowPhysDoubleDefs(allowDoubleDefs), OutFileName(getenv("LLVM_VERIFY_MACHINEINSTRS")) - {} - - void getAnalysisUsage(AnalysisUsage &AU) const { - AU.setPreservesAll(); - MachineFunctionPass::getAnalysisUsage(AU); - } + {} bool runOnMachineFunction(MachineFunction &MF); + Pass *const PASS; const bool allowVirtDoubleDefs; const bool allowPhysDoubleDefs; @@ -112,6 +107,10 @@ namespace { // regsKilled and regsLiveOut. RegSet vregsPassed; + // Vregs that must pass through MBB because they are needed by a successor + // block. This set is disjoint from regsLiveOut. + RegSet vregsRequired; + BBInfo() : reachable(false) {} // Add register to vregsPassed if it belongs there. Return true if @@ -133,6 +132,34 @@ namespace { return changed; } + // Add register to vregsRequired if it belongs there. Return true if + // anything changed. + bool addRequired(unsigned Reg) { + if (!TargetRegisterInfo::isVirtualRegister(Reg)) + return false; + if (regsLiveOut.count(Reg)) + return false; + return vregsRequired.insert(Reg).second; + } + + // Same for a full set. + bool addRequired(const RegSet &RS) { + bool changed = false; + for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) + if (addRequired(*I)) + changed = true; + return changed; + } + + // Same for a full map. + bool addRequired(const RegMap &RM) { + bool changed = false; + for (RegMap::const_iterator I = RM.begin(), E = RM.end(); I != E; ++I) + if (addRequired(I->first)) + changed = true; + return changed; + } + // Live-out registers are either in regsLiveOut or vregsPassed. bool isLiveOut(unsigned Reg) const { return regsLiveOut.count(Reg) || vregsPassed.count(Reg); @@ -146,6 +173,9 @@ namespace { return Reg < regsReserved.size() && regsReserved.test(Reg); } + // Analysis information if available + LiveVariables *LiveVars; + void visitMachineFunctionBefore(); void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB); void visitMachineInstrBefore(const MachineInstr *MI); @@ -163,20 +193,44 @@ namespace { void calcMaxRegsPassed(); void calcMinRegsPassed(); void checkPHIOps(const MachineBasicBlock *MBB); + + void calcRegsRequired(); + void verifyLiveVariables(); + }; + + struct MachineVerifierPass : public MachineFunctionPass { + static char ID; // Pass ID, replacement for typeid + bool AllowDoubleDefs; + + explicit MachineVerifierPass(bool allowDoubleDefs = false) + : MachineFunctionPass(&ID), + AllowDoubleDefs(allowDoubleDefs) {} + + void getAnalysisUsage(AnalysisUsage &AU) const { + AU.setPreservesAll(); + MachineFunctionPass::getAnalysisUsage(AU); + } + + bool runOnMachineFunction(MachineFunction &MF) { + MF.verify(this, AllowDoubleDefs); + return false; + } }; + } -char MachineVerifier::ID = 0; -static RegisterPass<MachineVerifier> +char MachineVerifierPass::ID = 0; +static RegisterPass<MachineVerifierPass> MachineVer("machineverifier", "Verify generated machine code"); static const PassInfo *const MachineVerifyID = &MachineVer; FunctionPass *llvm::createMachineVerifierPass(bool allowPhysDoubleDefs) { - return new MachineVerifier(allowPhysDoubleDefs); + return new MachineVerifierPass(allowPhysDoubleDefs); } -void MachineFunction::verify() const { - MachineVerifier().runOnMachineFunction(const_cast<MachineFunction&>(*this)); +void MachineFunction::verify(Pass *p, bool allowDoubleDefs) const { + MachineVerifier(p, allowDoubleDefs) + .runOnMachineFunction(const_cast<MachineFunction&>(*this)); } bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) { @@ -202,6 +256,12 @@ bool MachineVerifier::runOnMachineFuncti TRI = TM->getRegisterInfo(); MRI = &MF.getRegInfo(); + if (PASS) { + LiveVars = PASS->getAnalysisIfAvailable<LiveVariables>(); + } else { + LiveVars = NULL; + } + visitMachineFunctionBefore(); for (MachineFunction::const_iterator MFI = MF.begin(), MFE = MF.end(); MFI!=MFE; ++MFI) { @@ -518,8 +578,9 @@ MachineVerifier::visitMachineOperand(con } else if (MO->isUse()) { regsLiveInButUnused.erase(Reg); + bool isKill = false; if (MO->isKill()) { - addRegWithSubRegs(regsKilled, Reg); + isKill = true; // Tied operands on two-address instuctions MUST NOT have a <kill> flag. if (MI->isRegTiedToDefOperand(MONum)) report("Illegal kill flag on two-address instruction operand", @@ -529,8 +590,20 @@ MachineVerifier::visitMachineOperand(con unsigned defIdx; if (MI->isRegTiedToDefOperand(MONum, &defIdx) && MI->getOperand(defIdx).getReg() == Reg) - addRegWithSubRegs(regsKilled, Reg); + isKill = true; + } + if (isKill) { + addRegWithSubRegs(regsKilled, Reg); + + // Check that LiveVars knows this kill + if (LiveVars && TargetRegisterInfo::isVirtualRegister(Reg)) { + LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg); + if (std::find(VI.Kills.begin(), + VI.Kills.end(), MI) == VI.Kills.end()) + report("Kill missing from LiveVariables", MO, MONum); + } } + // Use of a dead register. if (!regsLive.count(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) { @@ -734,6 +807,41 @@ void MachineVerifier::calcMinRegsPassed( } } +// Calculate the set of virtual registers that must be passed through each basic +// block in order to satisfy the requirements of successor blocks. This is very +// similar to calcMaxRegsPassed, only backwards. +void MachineVerifier::calcRegsRequired() { + // First push live-in regs to predecessors' vregsRequired. + DenseSet<const MachineBasicBlock*> todo; + for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); + MFI != MFE; ++MFI) { + const MachineBasicBlock &MBB(*MFI); + BBInfo &MInfo = MBBInfoMap[&MBB]; + for (MachineBasicBlock::const_pred_iterator PrI = MBB.pred_begin(), + PrE = MBB.pred_end(); PrI != PrE; ++PrI) { + BBInfo &PInfo = MBBInfoMap[*PrI]; + if (PInfo.addRequired(MInfo.vregsLiveIn)) + todo.insert(*PrI); + } + } + + // Iteratively push vregsRequired to predecessors. This will converge to the + // same final state regardless of DenseSet iteration order. + while (!todo.empty()) { + const MachineBasicBlock *MBB = *todo.begin(); + todo.erase(MBB); + BBInfo &MInfo = MBBInfoMap[MBB]; + for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(), + PrE = MBB->pred_end(); PrI != PrE; ++PrI) { + if (*PrI == MBB) + continue; + BBInfo &SInfo = MBBInfoMap[*PrI]; + if (SInfo.addRequired(MInfo.vregsRequired)) + todo.insert(*PrI); + } + } +} + // Check PHI instructions at the beginning of MBB. It is assumed that // calcMinRegsPassed has been run so BBInfo::isLiveOut is valid. void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) { @@ -849,4 +957,39 @@ void MachineVerifier::visitMachineFuncti } } } + + // Now check LiveVariables info if available + if (LiveVars) { + calcRegsRequired(); + verifyLiveVariables(); + } } + +void MachineVerifier::verifyLiveVariables() { + assert(LiveVars && "Don't call verifyLiveVariables without LiveVars"); + for (unsigned Reg = TargetRegisterInfo::FirstVirtualRegister, + RegE = MRI->getLastVirtReg()-1; Reg != RegE; ++Reg) { + LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg); + for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); + MFI != MFE; ++MFI) { + BBInfo &MInfo = MBBInfoMap[MFI]; + + // Our vregsRequired should be identical to LiveVariables' AliveBlocks + if (MInfo.vregsRequired.count(Reg)) { + if (!VI.AliveBlocks.test(MFI->getNumber())) { + report("LiveVariables: Block missing from AliveBlocks", MFI); + *OS << "Virtual register %reg" << Reg + << " must be live through the block.\n"; + } + } else { + if (VI.AliveBlocks.test(MFI->getNumber())) { + report("LiveVariables: Block should not be in AliveBlocks", MFI); + *OS << "Virtual register %reg" << Reg + << " is not needed live through the block.\n"; + } + } + } + } +} + + Modified: vendor/llvm/dist/lib/CodeGen/PHIElimination.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/PHIElimination.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/PHIElimination.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -21,7 +21,6 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/RegAllocRegistry.h" #include "llvm/Function.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/SmallPtrSet.h" @@ -37,37 +36,17 @@ using namespace llvm; STATISTIC(NumAtomic, "Number of atomic phis lowered"); STATISTIC(NumSplits, "Number of critical edges split on demand"); -static cl::opt<bool> -SplitEdges("split-phi-edges", - cl::desc("Split critical edges during phi elimination"), - cl::init(false), cl::Hidden); - char PHIElimination::ID = 0; static RegisterPass<PHIElimination> X("phi-node-elimination", "Eliminate PHI nodes for register allocation"); const PassInfo *const llvm::PHIEliminationID = &X; -namespace llvm { FunctionPass *createLocalRegisterAllocator(); } - -// Should we run edge splitting? -static bool shouldSplitEdges() { - // Edge splitting breaks the local register allocator. It cannot tolerate - // LiveVariables being run. - if (RegisterRegAlloc::getDefault() == createLocalRegisterAllocator) - return false; - return SplitEdges; -} - void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<LiveVariables>(); AU.addPreserved<MachineDominatorTree>(); - if (shouldSplitEdges()) { - AU.addRequired<LiveVariables>(); - } else { - AU.setPreservesCFG(); - AU.addPreservedID(MachineLoopInfoID); - } + // rdar://7401784 This would be nice: + // AU.addPreservedID(MachineLoopInfoID); MachineFunctionPass::getAnalysisUsage(AU); } @@ -79,9 +58,9 @@ bool llvm::PHIElimination::runOnMachineF bool Changed = false; // Split critical edges to help the coalescer - if (shouldSplitEdges()) + if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) - Changed |= SplitPHIEdges(Fn, *I); + Changed |= SplitPHIEdges(Fn, *I, *LV); // Populate VRegPHIUseCount analyzePHINodes(Fn); @@ -361,10 +340,11 @@ void llvm::PHIElimination::analyzePHINod } bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF, - MachineBasicBlock &MBB) { + MachineBasicBlock &MBB, + LiveVariables &LV) { if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI) return false; // Quick exit for basic blocks without PHIs. - LiveVariables &LV = getAnalysis<LiveVariables>(); + for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) { for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { Modified: vendor/llvm/dist/lib/CodeGen/PHIElimination.h ============================================================================== --- vendor/llvm/dist/lib/CodeGen/PHIElimination.h Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/PHIElimination.h Thu Nov 19 08:59:28 2009 (r199511) @@ -90,7 +90,8 @@ namespace llvm { void analyzePHINodes(const MachineFunction& Fn); /// Split critical edges where necessary for good coalescer performance. - bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB); + bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, + LiveVariables &LV); /// isLiveOut - Determine if Reg is live out from MBB, when not /// considering PHI nodes. This means that Reg is either killed by Modified: vendor/llvm/dist/lib/CodeGen/RegAllocLinearScan.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/RegAllocLinearScan.cpp Thu Nov 19 08:10:24 2009 (r199510) +++ vendor/llvm/dist/lib/CodeGen/RegAllocLinearScan.cpp Thu Nov 19 08:59:28 2009 (r199511) @@ -59,11 +59,6 @@ PreSplitIntervals("pre-alloc-split", cl::desc("Pre-register allocation live interval splitting"), cl::init(false), cl::Hidden); -static cl::opt<bool> -NewSpillFramework("new-spill-framework", - cl::desc("New spilling framework"), - cl::init(false), cl::Hidden); - static RegisterRegAlloc linearscanRegAlloc("linearscan", "linear scan register allocator", createLinearScanRegisterAllocator); @@ -441,9 +436,7 @@ bool RALinScan::runOnMachineFunction(Mac vrm_ = &getAnalysis<VirtRegMap>(); if (!rewriter_.get()) rewriter_.reset(createVirtRegRewriter()); - if (NewSpillFramework) { - spiller_.reset(createSpiller(mf_, li_, ls_, vrm_)); - } + spiller_.reset(createSpiller(mf_, li_, ls_, loopInfo, vrm_)); initIntervalSets(); @@ -1157,11 +1150,7 @@ void RALinScan::assignRegOrStackSlotAtIn SmallVector<LiveInterval*, 8> spillIs; std::vector<LiveInterval*> added; - if (!NewSpillFramework) { - added = li_->addIntervalsForSpills(*cur, spillIs, loopInfo, *vrm_); - } else { - added = spiller_->spill(cur); - } + added = spiller_->spill(cur, spillIs); std::sort(added.begin(), added.end(), LISorter()); addStackInterval(cur, ls_, li_, mri_, *vrm_); @@ -1241,11 +1230,7 @@ void RALinScan::assignRegOrStackSlotAtIn earliestStartInterval : sli; std::vector<LiveInterval*> newIs; - if (!NewSpillFramework) { - newIs = li_->addIntervalsForSpills(*sli, spillIs, loopInfo, *vrm_); - } else { - newIs = spiller_->spill(sli); - } + newIs = spiller_->spill(sli, spillIs); addStackInterval(sli, ls_, li_, mri_, *vrm_); std::copy(newIs.begin(), newIs.end(), std::back_inserter(added)); spilled.insert(sli->reg); *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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