From owner-freebsd-net@FreeBSD.ORG Thu Sep 25 13:17:15 2014 Return-Path: Delivered-To: freebsd-net@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 6D50EEF4 for ; Thu, 25 Sep 2014 13:17:15 +0000 (UTC) Received: from nbfkord-smmo01.seg.att.com (nbfkord-smmo01.seg.att.com [209.65.160.76]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D751CBF0 for ; Thu, 25 Sep 2014 13:17:14 +0000 (UTC) Received: from unknown [12.187.104.25] (EHLO webmail.solarflare.com) by nbfkord-smmo01.seg.att.com(mxl_mta-7.2.2-0) with ESMTP id ad514245.2b41ef9a1940.5762.00-2499.11470.nbfkord-smmo01.seg.att.com (envelope-from ); Thu, 25 Sep 2014 13:17:14 +0000 (UTC) X-MXL-Hash: 542415da7b35fe58-732054f36b02073bf7f0a2eadf708878b5819c23 Received: from unknown [12.187.104.25] (EHLO webmail.solarflare.com) by nbfkord-smmo01.seg.att.com(mxl_mta-7.2.2-0) over TLS secured channel with ESMTP id 8f114245.0.727.00-2380.1260.nbfkord-smmo01.seg.att.com (envelope-from ); Thu, 25 Sep 2014 13:00:45 +0000 (UTC) X-MXL-Hash: 542411fd41896d10-1dd6e67cab37ab7383b29c7b8fc07a1f5c17d54c Received: from [192.168.38.17] (84.52.89.52) by webmail.SolarFlare.com (10.20.40.31) with Microsoft SMTP Server (TLS) id 14.3.158.1; Thu, 25 Sep 2014 06:00:04 -0700 Message-ID: <542411F4.6050404@solarflare.com> Date: Thu, 25 Sep 2014 17:00:36 +0400 From: Andrew Rybchenko User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Subject: [PATCH 1/4] sfxge: cleanup: code style fixes Content-Type: multipart/mixed; boundary="------------000900020605040502010202" X-Originating-IP: [84.52.89.52] X-TM-AS-Product-Ver: SMEX-10.0.0.1412-7.000.1014-20974.005 X-TM-AS-Result: No--6.622800-0.000000-31 X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-AnalysisOut: [v=2.0 cv=bdHcppzB c=1 sm=1 a=MkjXnYnS3dyNWGSWLXxFFQ==:17 a] X-AnalysisOut: [=Ozv50jBIw7UA:10 a=sOSmOZvzYpsA:10 a=jJKnQX15q-cA:10 a=4ox] X-AnalysisOut: [owH2qkH0A:10 a=RB3BGLmKESwA:10 a=BLceEmwcHowA:10 a=zRKbQ67] X-AnalysisOut: [AAAAA:8 a=qg_zykTt5_OaQZwxDF0A:9 a=wPNLvfGTeEIA:10 a=s9qa1] X-AnalysisOut: [pk-s7gA:10 a=0XUAfFN47ZxevexDWRoA:9 a=QEXdDO2ut3YA:10 a=SL] X-AnalysisOut: [Xm6D6uGZOTnXR_:21 a=cCbRZeE_8OnCNq1O:21] X-Spam: [F=0.2000000000; CM=0.500; S=0.200(2014051901)] X-MAIL-FROM: X-SOURCE-IP: [12.187.104.25] X-BeenThere: freebsd-net@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Networking and TCP/IP with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Sep 2014 13:17:15 -0000 --------------000900020605040502010202 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: quoted-printable Remove trailing whitespaces and tabs. Enclose value in return statements in parentheses. Use tabs after #define. Do not skip comparison with 0/NULL in boolean expressions. Submitted by: Andrew Rybchenko Sponsored by: Solarflare Communications, Inc. The information contained in this message is confidential and is intended f= or the addressee(s) only. If you have received this message in error, pleas= e notify the sender immediately and delete the message. Unless you are an a= ddressee (or authorized to receive for an addressee), you may not use, copy= or disclose to anyone this message or any information contained in this me= ssage. The unauthorized use, disclosure, copying or alteration of this mess= age is strictly prohibited. --------------000900020605040502010202 Content-Type: text/plain; charset="UTF-8"; name="cleanup" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="cleanup" cleanup: code style fixes Remove trailing whitespaces and tabs. Enclose value in return statements in parentheses. Use tabs after #define. Do not skip comparison with 0/NULL in boolean expressions. Submitted by: Andrew Rybchenko Sponsored by: Solarflare Communications, Inc. diff -r e7f6237a8d92 sys/dev/sfxge/common/efsys.h --- a/sys/dev/sfxge/common/efsys.h Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/common/efsys.h Thu Sep 25 15:59:36 2014 +0400 @@ -53,44 +53,44 @@ #define EFSYS_HAS_UINT64 1 #define EFSYS_USE_UINT64 0 #if _BYTE_ORDER == _BIG_ENDIAN -#define EFSYS_IS_BIG_ENDIAN 1 -#define EFSYS_IS_LITTLE_ENDIAN 0 +#define EFSYS_IS_BIG_ENDIAN 1 +#define EFSYS_IS_LITTLE_ENDIAN 0 #elif _BYTE_ORDER == _LITTLE_ENDIAN -#define EFSYS_IS_BIG_ENDIAN 0 -#define EFSYS_IS_LITTLE_ENDIAN 1 +#define EFSYS_IS_BIG_ENDIAN 0 +#define EFSYS_IS_LITTLE_ENDIAN 1 #endif #include "efx_types.h" /* Common code requires this */ #if __FreeBSD_version < 800068 -#define memmove(d, s, l) bcopy(s, d, l) +#define memmove(d, s, l) bcopy(s, d, l) #endif - + /* FreeBSD equivalents of Solaris things */ #ifndef _NOTE -#define _NOTE(s) +#define _NOTE(s) #endif #ifndef B_FALSE -#define B_FALSE FALSE +#define B_FALSE FALSE #endif #ifndef B_TRUE -#define B_TRUE TRUE +#define B_TRUE TRUE #endif #ifndef IS_P2ALIGNED -#define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0) +#define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0) #endif #ifndef P2ROUNDUP -#define P2ROUNDUP(x, align) (-(-(x) & -(align))) +#define P2ROUNDUP(x, align) (-(-(x) & -(align))) #endif #ifndef IS2P -#define ISP2(x) (((x) & ((x) - 1)) == 0) +#define ISP2(x) (((x) & ((x) - 1)) == 0) #endif -#define ENOTACTIVE EINVAL +#define ENOTACTIVE EINVAL /* Memory type to use on FreeBSD */ MALLOC_DECLARE(M_SFXGE); @@ -242,7 +242,7 @@ #define EFSYS_OPT_PHY_PROPS 0 #define EFSYS_OPT_PHY_BIST 1 #define EFSYS_OPT_PHY_LED_CONTROL 1 -#define EFSYS_OPT_PHY_FLAGS 0 +#define EFSYS_OPT_PHY_FLAGS 0 #define EFSYS_OPT_VPD 1 #define EFSYS_OPT_NVRAM 1 @@ -256,8 +256,8 @@ #define EFSYS_OPT_WOL 1 #define EFSYS_OPT_RX_SCALE 1 #define EFSYS_OPT_QSTATS 1 -#define EFSYS_OPT_FILTER 0 -#define EFSYS_OPT_RX_SCATTER 0 +#define EFSYS_OPT_FILTER 0 +#define EFSYS_OPT_RX_SCATTER 0 #define EFSYS_OPT_RX_HDR_SPLIT 0 #define EFSYS_OPT_EV_PREFETCH 0 @@ -272,7 +272,7 @@ #ifndef DTRACE_PROBE -#define EFSYS_PROBE(_name) +#define EFSYS_PROBE(_name) #define EFSYS_PROBE1(_name, _type1, _arg1) @@ -815,16 +815,16 @@ panic(#_exp); \ } while (0) -#define EFSYS_ASSERT3(_x, _op, _y, _t) do { \ +#define EFSYS_ASSERT3(_x, _op, _y, _t) do { \ const _t __x = (_t)(_x); \ const _t __y = (_t)(_y); \ if (!(__x _op __y)) \ - panic("assertion failed at %s:%u", __FILE__, __LINE__); \ + panic("assertion failed at %s:%u", __FILE__, __LINE__); \ } while(0) -#define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t) -#define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t) -#define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t) +#define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t) +#define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t) +#define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t) #ifdef __cplusplus } diff -r e7f6237a8d92 sys/dev/sfxge/sfxge.c --- a/sys/dev/sfxge/sfxge.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge.c Thu Sep 25 15:59:36 2014 +0400 @@ -57,12 +57,12 @@ #include "sfxge.h" #include "sfxge_rx.h" -#define SFXGE_CAP (IFCAP_VLAN_MTU | \ +#define SFXGE_CAP (IFCAP_VLAN_MTU | \ IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | IFCAP_TSO | \ IFCAP_JUMBO_MTU | IFCAP_LRO | \ IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE) -#define SFXGE_CAP_ENABLE SFXGE_CAP -#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | \ +#define SFXGE_CAP_ENABLE SFXGE_CAP +#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | \ IFCAP_JUMBO_MTU | IFCAP_LINKSTATE) MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); @@ -78,7 +78,7 @@ sx_assert(&sc->softc_lock, LA_XLOCKED); if (sc->init_state == SFXGE_STARTED) - return 0; + return (0); if (sc->init_state != SFXGE_REGISTERED) { rc = EINVAL; @@ -223,7 +223,7 @@ ifp->if_mtu = ifr->ifr_mtu; error = sfxge_start(sc); sx_xunlock(&sc->softc_lock); - if (error) { + if (error != 0) { ifp->if_flags &= ~IFF_UP; ifp->if_drv_flags &= ~IFF_DRV_RUNNING; if_down(ifp); @@ -287,7 +287,7 @@ if_free(ifp); } -static int +static int sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) { const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); @@ -324,11 +324,11 @@ if ((rc = sfxge_port_ifmedia_init(sc)) != 0) goto fail; - return 0; + return (0); fail: ether_ifdetach(sc->ifnet); - return rc; + return (rc); } void @@ -347,7 +347,7 @@ { efsys_bar_t *esbp = &sc->bar; - esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR); + esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR); if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, &esbp->esb_rid, RF_ACTIVE)) == NULL) { device_printf(sc->dev, "Cannot allocate BAR region %d\n", @@ -386,7 +386,7 @@ device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics"); - if (!sc->stats_node) { + if (sc->stats_node == NULL) { error = ENOMEM; goto fail; } @@ -554,14 +554,14 @@ struct sfxge_softc *sc = arg1; efx_vpd_value_t value; int rc; - + value.evv_tag = arg2 >> 16; value.evv_keyword = arg2 & 0xffff; if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value)) != 0) - return rc; + return (rc); - return SYSCTL_OUT(req, value.evv_value, value.evv_length); + return (SYSCTL_OUT(req, value.evv_value, value.evv_length)); } static void @@ -623,12 +623,12 @@ for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++) sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword); - return 0; - + return (0); + fail2: free(sc->vpd_data, M_SFXGE); fail: - return rc; + return (rc); } static void @@ -745,12 +745,12 @@ pci_device_id = pci_get_device(dev); rc = efx_family(pci_vendor_id, pci_device_id, &family); - if (rc) - return ENXIO; + if (rc != 0) + return (ENXIO); KASSERT(family == EFX_FAMILY_SIENA, ("impossible controller family")); device_set_desc(dev, "Solarflare SFC9000 family"); - return 0; + return (0); } static device_method_t sfxge_methods[] = { diff -r e7f6237a8d92 sys/dev/sfxge/sfxge.h --- a/sys/dev/sfxge/sfxge.h Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge.h Thu Sep 25 15:59:36 2014 +0400 @@ -30,7 +30,7 @@ */ #ifndef _SFXGE_H -#define _SFXGE_H +#define _SFXGE_H #include #include @@ -53,43 +53,43 @@ /* This should be right on most machines the driver will be used on, and * we needn't care too much about wasting a few KB per interface. */ -#define CACHE_LINE_SIZE 128 +#define CACHE_LINE_SIZE 128 #endif #ifndef IFCAP_LINKSTATE -#define IFCAP_LINKSTATE 0 +#define IFCAP_LINKSTATE 0 #endif #ifndef IFCAP_VLAN_HWTSO -#define IFCAP_VLAN_HWTSO 0 +#define IFCAP_VLAN_HWTSO 0 #endif #ifndef IFM_10G_T -#define IFM_10G_T IFM_UNKNOWN +#define IFM_10G_T IFM_UNKNOWN #endif #ifndef IFM_10G_KX4 -#define IFM_10G_KX4 IFM_10G_CX4 +#define IFM_10G_KX4 IFM_10G_CX4 #endif #if __FreeBSD_version >= 800054 /* Networking core is multiqueue aware. We can manage our own TX * queues and use m_pkthdr.flowid. */ -#define SFXGE_HAVE_MQ +#define SFXGE_HAVE_MQ #endif #if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ __FreeBSD_version >= 900003 -#define SFXGE_HAVE_DESCRIBE_INTR +#define SFXGE_HAVE_DESCRIBE_INTR #endif #ifdef IFM_ETH_RXPAUSE -#define SFXGE_HAVE_PAUSE_MEDIAOPTS +#define SFXGE_HAVE_PAUSE_MEDIAOPTS #endif #ifndef CTLTYPE_U64 -#define CTLTYPE_U64 CTLTYPE_QUAD +#define CTLTYPE_U64 CTLTYPE_QUAD #endif #include "sfxge_rx.h" #include "sfxge_tx.h" -#define SFXGE_IP_ALIGN 2 +#define SFXGE_IP_ALIGN 2 -#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ +#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ enum sfxge_evq_state { SFXGE_EVQ_UNINITIALIZED = 0, @@ -133,9 +133,9 @@ }; struct sfxge_intr_hdl { - int eih_rid; - void *eih_tag; - struct resource *eih_res; + int eih_rid; + void *eih_tag; + struct resource *eih_res; }; struct sfxge_intr { @@ -197,7 +197,7 @@ device_t dev; struct sx softc_lock; enum sfxge_softc_state init_state; - struct ifnet *ifnet; + struct ifnet *ifnet; unsigned int if_flags; struct sysctl_oid *stats_node; @@ -209,7 +209,7 @@ efx_nic_t *enp; struct mtx enp_lock; - bus_dma_tag_t parent_dma_tag; + bus_dma_tag_t parent_dma_tag; efsys_bar_t bar; struct sfxge_intr intr; @@ -243,8 +243,8 @@ #endif }; -#define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN) -#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) +#define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN) +#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING) /* * From sfxge.c. @@ -299,6 +299,6 @@ extern int sfxge_mac_filter_set(struct sfxge_softc *sc); extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); -#define SFXGE_MAX_MTU (9 * 1024) +#define SFXGE_MAX_MTU (9 * 1024) #endif /* _SFXGE_H */ diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_dma.c --- a/sys/dev/sfxge/sfxge_dma.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_dma.c Thu Sep 25 15:59:36 2014 +0400 @@ -50,7 +50,7 @@ addr = arg; - if (error) { + if (error != 0) { *addr = 0; return; } @@ -82,7 +82,7 @@ return (0); } #if defined(__i386__) || defined(__amd64__) - while (m && seg_count < maxsegs) { + while (m != NULL && seg_count < maxsegs) { /* * firmware doesn't like empty segments */ @@ -197,7 +197,7 @@ BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 0, /* flags */ NULL, NULL, /* lock, lockarg */ - &sc->parent_dma_tag)) { + &sc->parent_dma_tag) != 0) { device_printf(sc->dev, "Cannot allocate parent DMA tag\n"); return (ENOMEM); } diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_ev.c --- a/sys/dev/sfxge/sfxge_ev.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_ev.c Thu Sep 25 15:59:36 2014 +0400 @@ -226,7 +226,7 @@ KASSERT((evq->index == 0 && label < SFXGE_TXQ_NTYPES) || (label == SFXGE_TXQ_IP_TCP_UDP_CKSUM), ("unexpected txq label")); index = (evq->index == 0) ? label : (evq->index - 1 + SFXGE_TXQ_NTYPES); - return evq->sc->txq[index]; + return (evq->sc->txq[index]); } static boolean_t @@ -443,7 +443,7 @@ sfxge_ev_stat_update(sc); - return SYSCTL_OUT(req, &sc->ev_stats[id], sizeof(sc->ev_stats[id])); + return (SYSCTL_OUT(req, &sc->ev_stats[id], sizeof(sc->ev_stats[id]))); } static void @@ -493,7 +493,7 @@ sx_xlock(&sc->softc_lock); - if (req->newptr) { + if (req->newptr != NULL) { if ((error = SYSCTL_IN(req, &moderation, sizeof(moderation))) != 0) goto out; @@ -520,14 +520,14 @@ out: sx_xunlock(&sc->softc_lock); - return error; + return (error); } static boolean_t sfxge_ev_initialized(void *arg) { struct sfxge_evq *evq; - + evq = (struct sfxge_evq *)arg; KASSERT(evq->init_state == SFXGE_EVQ_STARTING, @@ -746,7 +746,7 @@ /* Initialize the event module */ if ((rc = efx_ev_init(sc->enp)) != 0) - return rc; + return (rc); /* Start the event queues */ for (index = 0; index < intr->n_alloc; index++) { diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_intr.c --- a/sys/dev/sfxge/sfxge_intr.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_intr.c Thu Sep 25 15:59:36 2014 +0400 @@ -70,19 +70,19 @@ ("intr->type != EFX_INTR_LINE")); if (intr->state != SFXGE_INTR_STARTED) - return FILTER_STRAY; + return (FILTER_STRAY); (void)efx_intr_status_line(enp, &fatal, &qmask); if (fatal) { (void) efx_intr_disable(enp); (void) efx_intr_fatal(enp); - return FILTER_HANDLED; + return (FILTER_HANDLED); } if (qmask != 0) { intr->zero_count = 0; - return FILTER_SCHEDULE_THREAD; + return (FILTER_SCHEDULE_THREAD); } /* SF bug 15783: If the function is not asserting its IRQ and @@ -97,13 +97,13 @@ if (intr->zero_count++ == 0) { if (evq->init_state == SFXGE_EVQ_STARTED) { if (efx_ev_qpending(evq->common, evq->read_ptr)) - return FILTER_SCHEDULE_THREAD; + return (FILTER_SCHEDULE_THREAD); efx_ev_qprime(evq->common, evq->read_ptr); - return FILTER_HANDLED; + return (FILTER_HANDLED); } } - return FILTER_STRAY; + return (FILTER_STRAY); } static void @@ -175,7 +175,7 @@ default: KASSERT(0, ("Invalid interrupt type")); - return EINVAL; + return (EINVAL); } /* Try to add the handlers */ @@ -254,7 +254,7 @@ table[i].eih_res = res; } - if (error) { + if (error != 0) { count = i - 1; for (i = 0; i < count; i++) bus_release_resource(dev, SYS_RES_IRQ, @@ -349,7 +349,7 @@ if (count == 0) return (EINVAL); - if ((error = pci_alloc_msi(dev, &count)) != 0) + if ((error = pci_alloc_msi(dev, &count)) != 0) return (ENOMEM); /* Allocate interrupt handler. */ @@ -424,7 +424,7 @@ sfxge_intr_stop(struct sfxge_softc *sc) { struct sfxge_intr *intr; - + intr = &sc->intr; KASSERT(intr->state == SFXGE_INTR_STARTED, diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_port.c --- a/sys/dev/sfxge/sfxge_port.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_port.c Thu Sep 25 15:59:36 2014 +0400 @@ -74,7 +74,7 @@ /* Try to update the cached counters */ if ((rc = efx_mac_stats_update(sc->enp, esmp, - port->mac_stats.decode_buf, NULL)) != EAGAIN) + port->mac_stats.decode_buf, NULL)) != EAGAIN) goto out; DELAY(100); @@ -83,7 +83,7 @@ rc = ETIMEDOUT; out: mtx_unlock(&port->lock); - return rc; + return (rc); } static int @@ -94,11 +94,11 @@ int rc; if ((rc = sfxge_mac_stat_update(sc)) != 0) - return rc; + return (rc); - return SYSCTL_OUT(req, + return (SYSCTL_OUT(req, (uint64_t *)sc->port.mac_stats.decode_buf + id, - sizeof(uint64_t)); + sizeof(uint64_t))); } static void @@ -130,9 +130,9 @@ struct ifmedia_entry *ifm = sc->media.ifm_cur; if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO)) - return EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; - return ((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | - ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0); + return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE); + return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) | + ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0)); } static unsigned int @@ -150,13 +150,13 @@ static unsigned int sfxge_port_wanted_fc(struct sfxge_softc *sc) { - return sc->port.wanted_fc; + return (sc->port.wanted_fc); } static unsigned int sfxge_port_link_fc_ifm(struct sfxge_softc *sc) { - return 0; + return (0); } static int @@ -172,7 +172,7 @@ mtx_lock(&port->lock); - if (req->newptr) { + if (req->newptr != NULL) { if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0) goto out; @@ -235,7 +235,7 @@ { struct sfxge_port *port; int link_state; - + port = &sc->port; if (port->link_mode == mode) @@ -289,7 +289,7 @@ /* Set promisc-unicast and broadcast filter bits */ if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC), B_TRUE)) != 0) - return rc; + return (rc); /* Set multicast hash filter */ if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { @@ -311,7 +311,7 @@ } if_maddr_runlock(ifp); } - return efx_mac_hash_set(enp, bucket); + return (efx_mac_hash_set(enp, bucket)); } int @@ -336,7 +336,7 @@ else rc = 0; mtx_unlock(&port->lock); - return rc; + return (rc); } void @@ -413,7 +413,7 @@ /* Update MAC stats by DMA every second */ if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, - 1000, B_FALSE)) != 0) + 1000, B_FALSE)) != 0) goto fail2; if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) @@ -435,7 +435,7 @@ (void)efx_mac_drain(enp, B_TRUE); fail3: (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, - 0, B_FALSE); + 0, B_FALSE); fail2: efx_port_fini(sc->enp); fail: @@ -488,7 +488,7 @@ rc = ETIMEDOUT; out: mtx_unlock(&port->lock); - return rc; + return (rc); } static int @@ -499,11 +499,11 @@ int rc; if ((rc = sfxge_phy_stat_update(sc)) != 0) - return rc; + return (rc); - return SYSCTL_OUT(req, + return (SYSCTL_OUT(req, (uint32_t *)sc->port.phy_stats.decode_buf + id, - sizeof(uint32_t)); + sizeof(uint32_t))); } static void @@ -619,7 +619,7 @@ free(port->phy_stats.decode_buf, M_SFXGE); (void)mtx_destroy(&port->lock); port->sc = NULL; - return rc; + return (rc); } static int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { @@ -697,9 +697,9 @@ rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data); out: - sx_xunlock(&sc->softc_lock); + sx_xunlock(&sc->softc_lock); - return rc; + return (rc); } int sfxge_port_ifmedia_init(struct sfxge_softc *sc) @@ -788,7 +788,7 @@ best_mode_ifm = mode_ifm; } - if (best_mode_ifm) + if (best_mode_ifm != 0) ifmedia_set(&sc->media, best_mode_ifm); /* Now discard port state until interface is started. */ @@ -796,5 +796,5 @@ out2: efx_nic_fini(sc->enp); out: - return rc; + return (rc); } diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_rx.c --- a/sys/dev/sfxge/sfxge_rx.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_rx.c Thu Sep 25 15:59:36 2014 +0400 @@ -54,8 +54,8 @@ #include "sfxge.h" #include "sfxge_rx.h" -#define RX_REFILL_THRESHOLD (EFX_RXQ_LIMIT(SFXGE_NDESCS) * 9 / 10) -#define RX_REFILL_THRESHOLD_2 (RX_REFILL_THRESHOLD / 2) +#define RX_REFILL_THRESHOLD (EFX_RXQ_LIMIT(SFXGE_NDESCS) * 9 / 10) +#define RX_REFILL_THRESHOLD_2 (RX_REFILL_THRESHOLD / 2) /* Size of the LRO hash table. Must be a power of 2. A larger table * means we can accelerate a larger number of streams. @@ -87,10 +87,10 @@ static int lro_loss_packets = 20; /* Flags for sfxge_lro_conn::l2_id; must not collide with EVL_VLID_MASK */ -#define SFXGE_LRO_L2_ID_VLAN 0x4000 -#define SFXGE_LRO_L2_ID_IPV6 0x8000 -#define SFXGE_LRO_CONN_IS_VLAN_ENCAP(c) ((c)->l2_id & SFXGE_LRO_L2_ID_VLAN) -#define SFXGE_LRO_CONN_IS_TCPIPV4(c) (!((c)->l2_id & SFXGE_LRO_L2_ID_IPV6)) +#define SFXGE_LRO_L2_ID_VLAN 0x4000 +#define SFXGE_LRO_L2_ID_IPV6 0x8000 +#define SFXGE_LRO_CONN_IS_VLAN_ENCAP(c) ((c)->l2_id & SFXGE_LRO_L2_ID_VLAN) +#define SFXGE_LRO_CONN_IS_TCPIPV4(c) (!((c)->l2_id & SFXGE_LRO_L2_ID_IPV6)) /* Compare IPv6 addresses, avoiding conditional branches */ static __inline unsigned long ipv6_addr_cmp(const struct in6_addr *left, @@ -179,12 +179,12 @@ m = (struct mbuf *)uma_zalloc_arg(zone_mbuf, &args, M_NOWAIT); /* Allocate (and attach) packet buffer */ - if (m && !uma_zalloc_arg(sc->rx_buffer_zone, m, M_NOWAIT)) { + if (m != NULL && !uma_zalloc_arg(sc->rx_buffer_zone, m, M_NOWAIT)) { uma_zfree(zone_mbuf, m); m = NULL; } - return m; + return (m); } #define SFXGE_REFILL_BATCH 64 @@ -370,7 +370,7 @@ KASSERT(!c->mbuf, ("found orphaned mbuf")); - if (c->next_buf.mbuf) { + if (c->next_buf.mbuf != NULL) { sfxge_rx_deliver(rxq->sc, &c->next_buf); LIST_REMOVE(c, active_link); } @@ -510,7 +510,7 @@ if (__predict_false(th_seq != c->next_seq)) { /* Out-of-order, so start counting again. */ - if (c->mbuf) + if (c->mbuf != NULL) sfxge_lro_deliver(&rxq->lro, c); c->n_in_order_pkts -= lro_loss_packets; c->next_seq = th_seq + data_length; @@ -522,10 +522,10 @@ now = ticks; if (now - c->last_pkt_ticks > lro_idle_ticks) { ++rxq->lro.n_drop_idle; - if (c->mbuf) + if (c->mbuf != NULL) sfxge_lro_deliver(&rxq->lro, c); sfxge_lro_drop(rxq, c); - return 0; + return (0); } c->last_pkt_ticks = ticks; @@ -537,12 +537,12 @@ } if (__predict_false(dont_merge)) { - if (c->mbuf) + if (c->mbuf != NULL) sfxge_lro_deliver(&rxq->lro, c); if (th->th_flags & (TH_FIN | TH_RST)) { ++rxq->lro.n_drop_closed; sfxge_lro_drop(rxq, c); - return 0; + return (0); } goto deliver_buf_out; } @@ -563,11 +563,11 @@ } rx_buf->mbuf = NULL; - return 1; + return (1); deliver_buf_out: sfxge_rx_deliver(rxq->sc, rx_buf); - return 1; + return (1); } static void sfxge_lro_new_conn(struct sfxge_lro_state *st, uint32_t conn_hash, @@ -621,7 +621,7 @@ struct sfxge_lro_conn *c; uint16_t l2_id; uint16_t l3_proto; - void *nh; + void *nh; struct tcphdr *th; uint32_t conn_hash; unsigned bucket; @@ -671,7 +671,7 @@ continue; if ((c->source - th->th_sport) | (c->dest - th->th_dport)) continue; - if (c->mbuf) { + if (c->mbuf != NULL) { if (SFXGE_LRO_CONN_IS_TCPIPV4(c)) { struct ip *c_iph, *iph = nh; c_iph = c->nh; @@ -691,7 +691,7 @@ TAILQ_REMOVE(&rxq->lro.conns[bucket], c, link); TAILQ_INSERT_HEAD(&rxq->lro.conns[bucket], c, link); - if (c->next_buf.mbuf) { + if (c->next_buf.mbuf != NULL) { if (!sfxge_lro_try_merge(rxq, c)) goto deliver_now; } else { @@ -720,10 +720,10 @@ while (!LIST_EMPTY(&st->active_conns)) { c = LIST_FIRST(&st->active_conns); - if (!c->delivered && c->mbuf) + if (!c->delivered && c->mbuf != NULL) sfxge_lro_deliver(st, c); if (sfxge_lro_try_merge(rxq, c)) { - if (c->mbuf) + if (c->mbuf != NULL) sfxge_lro_deliver(st, c); LIST_REMOVE(c, active_link); } @@ -836,7 +836,7 @@ evq = sc->evq[index]; mtx_lock(&evq->lock); - + KASSERT(rxq->init_state == SFXGE_RXQ_STARTED, ("rxq not started")); @@ -881,7 +881,7 @@ rxq->loopback = 0; /* Destroy the common code receive queue. */ - efx_rx_qdestroy(rxq->common); + efx_rx_qdestroy(rxq->common); efx_sram_buf_tbl_clear(sc->enp, rxq->buf_base_id, EFX_RXQ_NBUFS(SFXGE_NDESCS)); @@ -1136,7 +1136,7 @@ const char *name; size_t offset; } sfxge_rx_stats[] = { -#define SFXGE_RX_STAT(name, member) \ +#define SFXGE_RX_STAT(name, member) \ { #name, offsetof(struct sfxge_rxq, member) } SFXGE_RX_STAT(lro_merges, lro.n_merges), SFXGE_RX_STAT(lro_bursts, lro.n_bursts), @@ -1161,7 +1161,7 @@ sum += *(unsigned int *)((caddr_t)sc->rxq[index] + sfxge_rx_stats[id].offset); - return SYSCTL_OUT(req, &sum, sizeof(sum)); + return (SYSCTL_OUT(req, &sum, sizeof(sum))); } static void diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_rx.h --- a/sys/dev/sfxge/sfxge_rx.h Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_rx.h Thu Sep 25 15:59:36 2014 +0400 @@ -30,25 +30,25 @@ */ #ifndef _SFXGE_RX_H -#define _SFXGE_RX_H +#define _SFXGE_RX_H -#define SFXGE_MAGIC_RESERVED 0x8000 +#define SFXGE_MAGIC_RESERVED 0x8000 -#define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 6 -#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ - ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) +#define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 6 +#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ + ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) -#define SFXGE_MAGIC_RX_QFLUSH_DONE \ - (SFXGE_MAGIC_RESERVED | (1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) +#define SFXGE_MAGIC_RX_QFLUSH_DONE \ + (SFXGE_MAGIC_RESERVED | (1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_RX_QFLUSH_FAILED \ - (SFXGE_MAGIC_RESERVED | (2 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) +#define SFXGE_MAGIC_RX_QFLUSH_FAILED \ + (SFXGE_MAGIC_RESERVED | (2 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_RX_QREFILL \ - (SFXGE_MAGIC_RESERVED | (3 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) +#define SFXGE_MAGIC_RX_QREFILL \ + (SFXGE_MAGIC_RESERVED | (3 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_TX_QFLUSH_DONE \ - (SFXGE_MAGIC_RESERVED | (4 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) +#define SFXGE_MAGIC_TX_QFLUSH_DONE \ + (SFXGE_MAGIC_RESERVED | (4 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) #define SFXGE_RX_SCALE_MAX EFX_MAXRSS diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_tx.c --- a/sys/dev/sfxge/sfxge_tx.c Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_tx.c Thu Sep 25 15:59:36 2014 +0400 @@ -74,8 +74,8 @@ * the output at a packet boundary. Allow for a reasonable * minimum MSS of 512. */ -#define SFXGE_TSO_MAX_DESC ((65535 / 512) * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1) -#define SFXGE_TXQ_BLOCK_LEVEL (SFXGE_NDESCS - SFXGE_TSO_MAX_DESC) +#define SFXGE_TSO_MAX_DESC ((65535 / 512) * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1) +#define SFXGE_TXQ_BLOCK_LEVEL (SFXGE_NDESCS - SFXGE_TSO_MAX_DESC) /* Forward declarations. */ static inline void sfxge_tx_qdpl_service(struct sfxge_txq *txq); @@ -343,7 +343,7 @@ /* Post the fragment list. */ sfxge_tx_qlist_post(txq); - return 0; + return (0); reject_mapped: bus_dmamap_unload(txq->packet_dma_tag, *used_map); @@ -352,7 +352,7 @@ m_freem(mbuf); ++txq->drops; - return rc; + return (rc); } #ifdef SFXGE_HAVE_MQ @@ -426,8 +426,8 @@ ("queue unblocked but count is non-zero")); } -#define SFXGE_TX_QDPL_PENDING(_txq) \ - ((_txq)->dpl.std_put != 0) +#define SFXGE_TX_QDPL_PENDING(_txq) \ + ((_txq)->dpl.std_put != 0) /* * Service the deferred packet list. @@ -493,7 +493,7 @@ do { old = *putp; - if (old) { + if (old != 0) { struct mbuf *mp = (struct mbuf *)old; old_len = mp->m_pkthdr.csum_data; } else @@ -559,7 +559,6 @@ m_freem(m); atomic_add_long(&txq->early_drops, 1); return (rc); - } static void @@ -577,7 +576,7 @@ } stdp->std_get = NULL; stdp->std_count = 0; - stdp->std_getp = &stdp->std_get; + stdp->std_getp = &stdp->std_get; mtx_unlock(&txq->lock); } @@ -599,7 +598,7 @@ */ int sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) -{ +{ struct sfxge_softc *sc; struct sfxge_txq *txq; int rc; @@ -652,7 +651,7 @@ } while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf); + IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf); if (mbuf == NULL) break; @@ -757,15 +756,15 @@ /* Size of preallocated TSO header buffers. Larger blocks must be * allocated from the heap. */ -#define TSOH_STD_SIZE 128 +#define TSOH_STD_SIZE 128 /* At most half the descriptors in the queue at any time will refer to * a TSO header buffer, since they must always be followed by a * payload descriptor referring to an mbuf. */ -#define TSOH_COUNT (SFXGE_NDESCS / 2u) -#define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) -#define TSOH_PAGE_COUNT ((TSOH_COUNT + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE) +#define TSOH_COUNT (SFXGE_NDESCS / 2u) +#define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) +#define TSOH_PAGE_COUNT ((TSOH_COUNT + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE) static int tso_init(struct sfxge_txq *txq) { @@ -778,25 +777,25 @@ for (i = 0; i < TSOH_PAGE_COUNT; i++) { rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]); - if (rc) + if (rc != 0) goto fail; } - return 0; + return (0); fail: while (i-- > 0) sfxge_dma_free(&txq->tsoh_buffer[i]); free(txq->tsoh_buffer, M_SFXGE); txq->tsoh_buffer = NULL; - return rc; + return (rc); } static void tso_fini(struct sfxge_txq *txq) { int i; - if (txq->tsoh_buffer) { + if (txq->tsoh_buffer != NULL) { for (i = 0; i < TSOH_PAGE_COUNT; i++) sfxge_dma_free(&txq->tsoh_buffer[i]); free(txq->tsoh_buffer, M_SFXGE); @@ -925,7 +924,7 @@ /* We cannot use bus_dmamem_alloc() as that may sleep */ header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); if (__predict_false(!header)) - return ENOMEM; + return (ENOMEM); rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, header, tso->header_len, tso_map_long_header, &dma_addr, @@ -938,7 +937,7 @@ rc = EINVAL; } free(header, M_SFXGE); - return rc; + return (rc); } map = stmp->map; @@ -987,7 +986,7 @@ desc->eb_size = tso->header_len; desc->eb_eop = 0; - return 0; + return (0); } static int @@ -1048,7 +1047,7 @@ } txq->tso_bursts++; - return id; + return (id); } static void @@ -1200,7 +1199,7 @@ goto fail; mtx_lock(SFXGE_TXQ_LOCK(txq)); - + /* Enable the transmit queue. */ efx_tx_qenable(txq->common); @@ -1229,7 +1228,7 @@ sfxge_tx_qstop(sc, SFXGE_TXQ_IP_CKSUM); encp = efx_nic_cfg_get(sc->enp); - sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM); + sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM); /* Tear down the transmit module */ efx_tx_fini(sc->enp); @@ -1266,7 +1265,7 @@ sfxge_tx_qstop(sc, SFXGE_TXQ_IP_CKSUM); fail2: - sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM); + sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM); fail: efx_tx_fini(sc->enp); @@ -1293,7 +1292,7 @@ /* Free the context arrays. */ free(txq->pend_desc, M_SFXGE); - while (nmaps--) + while (nmaps-- != 0) bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); free(txq->stmp, M_SFXGE); @@ -1385,7 +1384,7 @@ fail3: free(txq->pend_desc, M_SFXGE); fail2: - while (nmaps--) + while (nmaps-- != 0) bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map); free(txq->stmp, M_SFXGE); bus_dma_tag_destroy(txq->packet_dma_tag); @@ -1400,7 +1399,7 @@ const char *name; size_t offset; } sfxge_tx_stats[] = { -#define SFXGE_TX_STAT(name, member) \ +#define SFXGE_TX_STAT(name, member) \ { #name, offsetof(struct sfxge_txq, member) } SFXGE_TX_STAT(tso_bursts, tso_bursts), SFXGE_TX_STAT(tso_packets, tso_packets), @@ -1426,7 +1425,7 @@ sum += *(unsigned long *)((caddr_t)sc->txq[index] + sfxge_tx_stats[id].offset); - return SYSCTL_OUT(req, &sum, sizeof(sum)); + return (SYSCTL_OUT(req, &sum, sizeof(sum))); } static void @@ -1460,7 +1459,7 @@ sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index); sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM); - sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM); + sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM); } diff -r e7f6237a8d92 sys/dev/sfxge/sfxge_tx.h --- a/sys/dev/sfxge/sfxge_tx.h Thu Sep 25 12:25:30 2014 +0400 +++ b/sys/dev/sfxge/sfxge_tx.h Thu Sep 25 15:59:36 2014 +0400 @@ -30,7 +30,7 @@ */ #ifndef _SFXGE_TX_H -#define _SFXGE_TX_H +#define _SFXGE_TX_H #include #include @@ -47,7 +47,7 @@ * could overlap all mbufs in the chain and also require an extra * segment for a TSO header. */ -#define SFXGE_TX_PACKET_MAX_SEG (SFXGE_TX_MAPPING_MAX_SEG + 1) +#define SFXGE_TX_PACKET_MAX_SEG (SFXGE_TX_MAPPING_MAX_SEG + 1) /* * Buffer mapping flags. @@ -111,11 +111,11 @@ #define SFXGE_TX_BATCH 64 #ifdef SFXGE_HAVE_MQ -#define SFXGE_TXQ_LOCK(txq) (&(txq)->lock) -#define SFXGE_TX_SCALE(sc) ((sc)->intr.n_alloc) +#define SFXGE_TXQ_LOCK(txq) (&(txq)->lock) +#define SFXGE_TX_SCALE(sc) ((sc)->intr.n_alloc) #else -#define SFXGE_TXQ_LOCK(txq) (&(txq)->sc->tx_lock) -#define SFXGE_TX_SCALE(sc) 1 +#define SFXGE_TXQ_LOCK(txq) (&(txq)->sc->tx_lock) +#define SFXGE_TX_SCALE(sc) 1 #endif struct sfxge_txq { --------------000900020605040502010202--