From owner-svn-src-all@FreeBSD.ORG Sat May 2 04:19:13 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 6D3CA23D; Sat, 2 May 2015 04:19:13 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4E2161895; Sat, 2 May 2015 04:19:13 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t424JDUV095806; Sat, 2 May 2015 04:19:13 GMT (envelope-from neel@FreeBSD.org) Received: (from neel@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t424JCb9095802; Sat, 2 May 2015 04:19:12 GMT (envelope-from neel@FreeBSD.org) Message-Id: <201505020419.t424JCb9095802@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: neel set sender to neel@FreeBSD.org using -f From: Neel Natu Date: Sat, 2 May 2015 04:19:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r282336 - in head/sys/amd64/vmm: . amd intel X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 May 2015 04:19:13 -0000 Author: neel Date: Sat May 2 04:19:11 2015 New Revision: 282336 URL: https://svnweb.freebsd.org/changeset/base/282336 Log: Emulate machine check related MSRs to allow guest OSes like Windows to boot. Reported by: Leon Dang (ldang@nahannisys.com) MFC after: 2 weeks Modified: head/sys/amd64/vmm/amd/svm_msr.c head/sys/amd64/vmm/intel/vmx_msr.c head/sys/amd64/vmm/x86.c Modified: head/sys/amd64/vmm/amd/svm_msr.c ============================================================================== --- head/sys/amd64/vmm/amd/svm_msr.c Sat May 2 03:25:24 2015 (r282335) +++ head/sys/amd64/vmm/amd/svm_msr.c Sat May 2 04:19:11 2015 (r282336) @@ -110,6 +110,10 @@ svm_rdmsr(struct svm_softc *sc, int vcpu int error = 0; switch (num) { + case MSR_MCG_CAP: + case MSR_MCG_STATUS: + *result = 0; + break; case MSR_MTRRcap: case MSR_MTRRdefType: case MSR_MTRR4kBase ... MSR_MTRR4kBase + 8: @@ -135,6 +139,9 @@ svm_wrmsr(struct svm_softc *sc, int vcpu int error = 0; switch (num) { + case MSR_MCG_CAP: + case MSR_MCG_STATUS: + break; /* ignore writes */ case MSR_MTRRcap: vm_inject_gp(sc->vm, vcpu); break; Modified: head/sys/amd64/vmm/intel/vmx_msr.c ============================================================================== --- head/sys/amd64/vmm/intel/vmx_msr.c Sat May 2 03:25:24 2015 (r282335) +++ head/sys/amd64/vmm/intel/vmx_msr.c Sat May 2 04:19:11 2015 (r282336) @@ -395,6 +395,10 @@ vmx_rdmsr(struct vmx *vmx, int vcpuid, u error = 0; switch (num) { + case MSR_MCG_CAP: + case MSR_MCG_STATUS: + *val = 0; + break; case MSR_MTRRcap: case MSR_MTRRdefType: case MSR_MTRR4kBase ... MSR_MTRR4kBase + 8: @@ -433,6 +437,9 @@ vmx_wrmsr(struct vmx *vmx, int vcpuid, u error = 0; switch (num) { + case MSR_MCG_CAP: + case MSR_MCG_STATUS: + break; /* ignore writes */ case MSR_MTRRcap: vm_inject_gp(vmx->vm, vcpuid); break; Modified: head/sys/amd64/vmm/x86.c ============================================================================== --- head/sys/amd64/vmm/x86.c Sat May 2 03:25:24 2015 (r282335) +++ head/sys/amd64/vmm/x86.c Sat May 2 04:19:11 2015 (r282336) @@ -285,17 +285,20 @@ x86_emulate_cpuid(struct vm *vm, int vcp * Hide thermal monitoring */ regs[3] &= ~(CPUID_ACPI | CPUID_TM); - + /* - * Machine check handling is done in the host. + * Hide the debug store capability. */ - regs[3] &= ~(CPUID_MCA | CPUID_MCE); - - /* - * Hide the debug store capability. - */ regs[3] &= ~CPUID_DS; + /* + * Advertise the Machine Check and MTRR capability. + * + * Some guest OSes (e.g. Windows) will not boot if + * these features are absent. + */ + regs[3] |= (CPUID_MCA | CPUID_MCE | CPUID_MTRR); + logical_cpus = threads_per_core * cores_per_package; regs[1] &= ~CPUID_HTT_CORES; regs[1] |= (logical_cpus & 0xff) << 16;