From owner-svn-src-all@freebsd.org Thu Oct 17 23:26:39 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id BF8671600FA; Thu, 17 Oct 2019 23:26:39 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46vQKW4dGQz3Mm0; Thu, 17 Oct 2019 23:26:39 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 7E26F27F47; Thu, 17 Oct 2019 23:26:39 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x9HNQdpY035758; Thu, 17 Oct 2019 23:26:39 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x9HNQdVc035757; Thu, 17 Oct 2019 23:26:39 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201910172326.x9HNQdVc035757@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Thu, 17 Oct 2019 23:26:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r353705 - stable/12/usr.sbin/bhyve X-SVN-Group: stable-12 X-SVN-Commit-Author: jhb X-SVN-Commit-Paths: stable/12/usr.sbin/bhyve X-SVN-Commit-Revision: 353705 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Oct 2019 23:26:39 -0000 Author: jhb Date: Thu Oct 17 23:26:39 2019 New Revision: 353705 URL: https://svnweb.freebsd.org/changeset/base/353705 Log: MFC 348778,348998: Enable memory and I/O decoding in PCI devices on demand. 348778: Enable memory and I/O decoding in PCI devices on demand. Rather than uncoditionally setting the MEMEN and PORTEN bits in PCIR_COMMAND for PCI devices, set the respective bit when the first BAR of a given type is added to the device. This more closely matches what firmware does on bare metal. BUSMASTEREN is still set unconditionally. Eventually this bit should move into the device models as not all device models need this set. 348998: Remove a spurious break when setting up a 64-bit memory BAR. This was causing 'enbit' to not be initialized in this case. Modified: stable/12/usr.sbin/bhyve/pci_emul.c Directory Properties: stable/12/ (props changed) Modified: stable/12/usr.sbin/bhyve/pci_emul.c ============================================================================== --- stable/12/usr.sbin/bhyve/pci_emul.c Thu Oct 17 23:22:00 2019 (r353704) +++ stable/12/usr.sbin/bhyve/pci_emul.c Thu Oct 17 23:26:39 2019 (r353705) @@ -586,6 +586,7 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, { int error; uint64_t *baseptr, limit, addr, mask, lobits, bar; + uint16_t cmd, enbit; assert(idx >= 0 && idx <= PCI_BARMAX); @@ -604,13 +605,14 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, switch (type) { case PCIBAR_NONE: baseptr = NULL; - addr = mask = lobits = 0; + addr = mask = lobits = enbit = 0; break; case PCIBAR_IO: baseptr = &pci_emul_iobase; limit = PCI_EMUL_IOLIMIT; mask = PCIM_BAR_IO_BASE; lobits = PCIM_BAR_IO_SPACE; + enbit = PCIM_CMD_PORTEN; break; case PCIBAR_MEM64: /* @@ -632,19 +634,20 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, mask = PCIM_BAR_MEM_BASE; lobits = PCIM_BAR_MEM_SPACE | PCIM_BAR_MEM_64 | PCIM_BAR_MEM_PREFETCH; - break; } else { baseptr = &pci_emul_membase32; limit = PCI_EMUL_MEMLIMIT32; mask = PCIM_BAR_MEM_BASE; lobits = PCIM_BAR_MEM_SPACE | PCIM_BAR_MEM_64; } + enbit = PCIM_CMD_MEMEN; break; case PCIBAR_MEM32: baseptr = &pci_emul_membase32; limit = PCI_EMUL_MEMLIMIT32; mask = PCIM_BAR_MEM_BASE; lobits = PCIM_BAR_MEM_SPACE | PCIM_BAR_MEM_32; + enbit = PCIM_CMD_MEMEN; break; default: printf("pci_emul_alloc_base: invalid bar type %d\n", type); @@ -671,6 +674,9 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32); } + cmd = pci_get_cfgdata16(pdi, PCIR_COMMAND); + if ((cmd & enbit) != enbit) + pci_set_cfgdata16(pdi, PCIR_COMMAND, cmd | enbit); register_bar(pdi, idx); return (0); @@ -756,8 +762,7 @@ pci_emul_init(struct vmctx *ctx, struct pci_devemu *pd pci_set_cfgdata8(pdi, PCIR_INTLINE, 255); pci_set_cfgdata8(pdi, PCIR_INTPIN, 0); - pci_set_cfgdata8(pdi, PCIR_COMMAND, - PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN); + pci_set_cfgdata8(pdi, PCIR_COMMAND, PCIM_CMD_BUSMASTEREN); err = (*pde->pe_init)(ctx, pdi, fi->fi_param); if (err == 0)