From owner-freebsd-arch@FreeBSD.ORG Sun May 22 04:35:43 2005 Return-Path: X-Original-To: freebsd-arch@freebsd.org Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6719816A41F for ; Sun, 22 May 2005 04:35:43 +0000 (GMT) (envelope-from cperciva@freebsd.org) Received: from pd3mo2so.prod.shaw.ca (shawidc-mo1.cg.shawcable.net [24.71.223.10]) by mx1.FreeBSD.org (Postfix) with ESMTP id 12CF143D1D for ; Sun, 22 May 2005 04:35:42 +0000 (GMT) (envelope-from cperciva@freebsd.org) Received: from pd3mr3so.prod.shaw.ca (pd3mr3so-qfe3.prod.shaw.ca [10.0.141.179]) by l-daemon (Sun ONE Messaging Server 6.0 HotFix 1.01 (built Mar 15 2004)) with ESMTP id <0IGV005FDJEYHHE0@l-daemon> for freebsd-arch@freebsd.org; Sat, 21 May 2005 22:35:22 -0600 (MDT) Received: from pn2ml7so.prod.shaw.ca ([10.0.121.151]) by pd3mr3so.prod.shaw.ca (Sun ONE Messaging Server 6.0 HotFix 1.01 (built Mar 15 2004)) with ESMTP id <0IGV001Q2JEXV4I0@pd3mr3so.prod.shaw.ca> for freebsd-arch@freebsd.org; Sat, 21 May 2005 22:35:22 -0600 (MDT) Received: from [192.168.0.60] (S0106006067227a4a.vc.shawcable.net [24.87.209.6]) by l-daemon (iPlanet Messaging Server 5.2 HotFix 1.18 (built Jul 28 2003)) with ESMTP id <0IGV00K3PJEX6N@l-daemon> for freebsd-arch@freebsd.org; Sat, 21 May 2005 22:35:21 -0600 (MDT) Date: Sat, 21 May 2005 21:35:13 -0700 From: Colin Percival In-reply-to: <6451b639f2e0ddacb18f62c571dfeedb@xcllnt.net> To: Marcel Moolenaar Message-id: <42900C01.10904@freebsd.org> MIME-version: 1.0 Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 7bit X-Accept-Language: en-us, en X-Enigmail-Version: 0.91.0.0 References: <428FC00B.3080909@freebsd.org> <428FD710.4060200@freebsd.org> <9e8314b53980a379445cc8c07086901d@xcllnt.net> <428FE788.8020408@freebsd.org> <6451b639f2e0ddacb18f62c571dfeedb@xcllnt.net> User-Agent: Mozilla Thunderbird 1.0.2 (X11/20050406) cc: freebsd-arch@freebsd.org Subject: Re: Scheduler fixes for hyperthreading X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 22 May 2005 04:35:43 -0000 Marcel Moolenaar wrote: > There are a lot of variables that need to be taken into account and > those variables do not necessarily map perfectly from a P4 to an I2. > Sharing of the L1 cache is not a sufficient condition to create a > side-channel for timing attacks. A reliable time source with enough > precision is also necessary (as you and Stephan have pointed out). > The precision of the time source depends on latencies of the various > cache levels and the micro-architectural behavior of the processor. Point taken. I maintain, however, that it is much better to make "information can leak between these processors" a machine-independent concept which is handled appropriately by the scheduler (with the necessary machine-dependent code to specify *which* sets of processors, if any, have such leakage). Colin Percival