Date: Tue, 1 Jul 2003 08:22:02 -0400 (EDT) From: Andrew Gallatin <gallatin@cs.duke.edu> To: ticso@cicely.de Cc: freebsd-arch@freebsd.org Subject: Re: API change for bus_dma Message-ID: <16129.31978.982920.826662@grasshopper.cs.duke.edu> In-Reply-To: <20030701092944.GE90081@cicely12.cicely.de> References: <3EF3C12F.9060303@btc.adaptec.com> <16124.39930.142492.356163@grasshopper.cs.duke.edu> <3EFC9F2D.6020908@btc.adaptec.com> <16124.43999.333761.397624@grasshopper.cs.duke.edu> <3EFCAC7A.6060305@btc.adaptec.com> <16124.45051.919899.414795@grasshopper.cs.duke.edu> <3EFD4755.49BAF150@mindspring.com> <16128.17218.973911.980939@grasshopper.cs.duke.edu> <20030701092944.GE90081@cicely12.cicely.de>
next in thread | previous in thread | raw e-mail | index | archive | help
Bernd Walter writes: > On Mon, Jun 30, 2003 at 10:03:46AM -0400, Andrew Gallatin wrote: > > The idea is that I want to establish a mapping that can be used many > > times without any driver or kernel attention. I don't want to do > > anything in terms of a system call, or interrupt, etc, to sync the > > cache with the state of the DMA'ed page before a DMA read or after a DMA > > write. > > > > For example, scatter gather mapping on alphas (if FreeBSD supported it > > for PCI devices) would be fine with me since its cache-coherent and > > doesn't require any ddi_dma_sync() operations. > > What makes you shure about alpha dma to be cache-coherent? 7 years of sometimes painful experience with Myrinet on alpha ;) > I'm not shure that the current implementation of _bus_dmamap_sync() > without barriers is correct. Barriers, if present, would be used to flush write buffers in the CPU so they're seen by the cache, not to flush the cache itself. I agree they should be present. Drew
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?16129.31978.982920.826662>